numeric-conformance-packs / p3109_crosswalk.json
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{
"$schema": "https://json-schema.org/draft/2020-12/schema",
"title": "IEEE P3109 v3.2.0 cross-walk for the playra/numeric-conformance-packs",
"description": "Maps the formats covered in our conformance packs onto the corresponding IEEE P3109 v3.2.0 named formats. This is an implementor cross-reference, not a compliance assertion. Where the P3109 v3.2.0 working draft and a vendor convention disagree (e.g. FP8 E4M3 overflow-to-NaN vs saturate-to-max), the gap is documented honestly in the pack and in the methodology paper, not hidden.",
"version": "1.0.0",
"date_published": "2026-06-13",
"source_standard": {
"title": "IEEE P3109 v3.2.0 -- Standard for Arithmetic Formats for Machine Learning",
"status": "draft",
"url": "https://github.com/P3109/Public"
},
"source_catalog": {
"title": "playra/numeric-conformance-packs",
"url": "https://huggingface.co/datasets/playra/numeric-conformance-packs",
"version": "2.1.0"
},
"anchor": {
"identity": "phi^2 + phi^-2 = 3",
"sha256_of_identity_string": "218403e344779c890f302ad2c70af21fb765060dd794d793c7eacc1ef8f80e6b"
},
"mappings": [
{
"pack_format": "fp8_e4m3",
"p3109_name": "Binary8p3se",
"p3109_section": "P3109 v3.2.0 -- 8-bit FP family, p=3 (3 exponent bits), s=signed, e=encoded",
"layout": "1s 4e 3m",
"bias": 7,
"infinity": "absent (no infinity encoding)",
"nan": "single canonical pattern 0x7F / 0xFF",
"overflow_policy": {
"ours": "saturate to max finite 448.0 (0x7E) -- tt-metal / AMD convention",
"p3109_v3_2_0": "draft permits both saturate and overflow-to-NaN (OCP MX v1.0 also permits both); JAX/TPU conventionally uses overflow-to-NaN (0x7F)",
"honest_note": "Single documented interpretation gap; pack vector input=1000.0 carries our 0x7E with abs_error stated honestly."
},
"anchor_3_0_at_bits": "0x44"
},
{
"pack_format": "fp8_e5m2",
"p3109_name": "Binary8p2se",
"p3109_section": "P3109 v3.2.0 -- 8-bit FP family, p=2",
"layout": "1s 5e 2m",
"bias": 15,
"infinity": "0x7C / 0xFC (true IEEE-style infinity)",
"nan": "E=11111 AND M != 0",
"overflow_policy": "overflow to +/-Inf (true IEEE)",
"anchor_3_0_at_bits": "0x42"
},
{
"pack_format": "mxfp4",
"p3109_name": "Binary4p1sf (element); block scale separate (E8M0 = Binary8 scale-only)",
"p3109_section": "P3109 v3.2.0 element-only mapping; full block format is OCP Microscaling v1.0",
"layout": "1s 2e 1m (element only, 4 bits)",
"bias": 1,
"grid": [0, 0.5, 1, 1.5, 2, 3, 4, 6],
"infinity": "absent",
"nan": "absent",
"overflow_policy": "clamp; note that the conventional clamp bound is 7 (one step above grid max 6), which is a frequent failure point in implementations",
"anchor_3_0_at_bits": "0x5",
"block_size_ocp_default": 32,
"block_scale": "shared E8M0 exponent (Binary8 scale-only in P3109 surface area)"
},
{
"pack_format": "bf16",
"p3109_name": "out of P3109 scope (P3109 covers 8-bit family only); for cross-reference, this is bfloat16 = IEEE 754 truncated binary32",
"p3109_section": "n/a",
"layout": "1s 8e 7m",
"bias": 127,
"infinity": "present (IEEE)",
"nan": "present (IEEE)",
"overflow_policy": "overflow to +/-Inf (true IEEE)",
"honest_note": "Accumulation order (sequential vs pairwise vs f64 reference) is the dominant error source in deep reduction trees, not single-op rounding. Pack carries a golden_accumulation section to demonstrate this honestly."
},
{
"pack_format": "e8m0_block",
"p3109_name": "scale-only Binary8 surface (P3109 v3.2.0 acknowledges OCP MX block-scale wrapper)",
"p3109_section": "informative cross-reference only; OCP MX v1.0 is the normative source for the block-scale wrapper",
"layout": "8 exponent bits, no mantissa, no sign",
"purpose": "Shared exponent scale across an MX block (default 32 elements for MXFP4 / MXFP6 / MXFP8 / MXINT8)",
"ocp_source": "Open Compute Project Microscaling Formats (MX) Specification v1.0"
},
{
"pack_format": "gf16",
"p3109_name": "out of P3109 scope (P3109 covers 8-bit family only); GoldenFloat is a separate phi-structured family covered in the GoldenFloat preprint arXiv:2606.05017",
"p3109_section": "n/a",
"layout": "1s 6e 9m",
"bias": 31,
"anchor_3_0_at_bits": "0x4100",
"design_rule": "Field-width split chosen so that E/M -> 1/phi ~= 0.618; closed-form: e = round((N-1)/phi^2), m = N-1-e, bias = 2^(e-1) - 1.",
"silicon_attestation": "Trinity S3AI Gamma tape-out (TTSKY26b shuttle); gf16_v2_mul Verilog frozen pre-tape-out, FPGA-validated on Artix-7 at 323 MHz (35/35 testbench)."
}
],
"notes_for_implementors": [
"P3109 v3.2.0 is a working DRAFT; mappings here defer to the FLoPS Lean formalisation (arXiv:2602.15965) on any normative ambiguity.",
"The FP8 E4M3 overflow-to-NaN vs saturate-to-max gap is a known industry-wide ambiguity; we ship our convention with the abs_error stated honestly, and surface the gap in the methodology paper rather than hiding it.",
"MXFP4 element layout matches between OCP Microscaling v1.0 and NVFP4 (NVIDIA Blackwell); the difference is block scale (E8M0 for MXFP4 vs E4M3 for NVFP4) and block size (32 vs 16)."
],
"external_references": {
"p3109_repo": "https://github.com/P3109/Public",
"flops_lean": "https://arxiv.org/abs/2602.15965",
"ocp_mx_v1": "https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf",
"ml_dtypes": "https://github.com/jax-ml/ml_dtypes",
"takum_counterexample": "https://arxiv.org/abs/2412.20273",
"goldenfloat_preprint": "https://arxiv.org/abs/2606.05017",
"catalog_paper": "https://arxiv.org/abs/2606.09686"
}
}