Multiple Function Definition Error Makefile? : <p>So this shouldn't be giving nearly as much trouble as it is, but I'm trying to create a more efficient makefile using wildcard operators as opposed to the tedious method I used to employ where you go through and make each individual object file and then link them together. But, for whatever reason, Whenever I try to run 'make' it gives me this:</p>

<pre><code>multiple definition of 'ScreenMgr::ScreenMgr()'
/path/to/ScrenMgr.cpp:4: first defined here
</code></pre>

<p>then it also gives me another error immediately after this one that says:</p>

<pre><code>undefined reference to main
collect2: error: ld returned 1 exit status
</code></pre>

<p>Though before these errors, my .o are produced and placed in the proper directory, so the error must be with the linker. I can include the c++ source if somebody thinks it'll help, but the files are practically empty as it is (Though I still put header guards in), because I just wanted to ensure that everything links properly first, so I can deal with problems like this without having to worry about the code as well. The directory structure looks like:</p>

<pre><code>-MsSolver
|--src
|  |--main.cpp
|  |--ScreenMgr.cpp
|--include
|  |--ScreenMgr.h
|--build #empty directory
|  
|--Makefile
|:
|--bin
</code></pre>

<p>and here's the makefile:</p>

<pre><code>CC:=g++
DEBUG:=-g
CFLAGS:=-Wall $(DEBUG)
LDFLAGS:=-Wall $(DEBUG)

SRCDIR:=$(PWD)/src
BUILDDIR:=$(PWD)/build
INCDIR:=$(PWD)/include
BINDIR:=$(PWD)/bin


FILES:=ScreenMgr main
INCLUDES:=-I$(INCDIR)
SRCS:=$(patsubst %,$(SRCDIR)/%.cpp,$(FILES))
OBJS:=$(patsubst %,$(BUILDDIR)/%.o,$(FILES))
LIBS:=-lX11
TARGET:=mssolver

#create executable and link
$(BINDIR)/$(TARGET): $(OBJS)
    $(CC) $(LFLAGS) $(INCLUDES) $(LIBS) $(OBJS) -o $@

#Compile objs
$(BUILDIR)/%.o: $(SRCS)
    $(CC) $(CFLAGS) -c $&lt; -o $@

clean:
    rm -f $(BUILDDIR)/*.o $(BINDIR)/*.o $(INCDIR)/*.swp $(SRCDIR)/*.swp
</code></pre>
