how does cuda handle precisely a memory access : i would like to know how CUDA hardware/run-time system handles the following case. 
If a warp(warp1 in the following) instruction involves access to the memory (load/store); the run-time system schedules the next ready warp for execution. 
When the new warp is executed, 
1- will warp1 "memory access" be conducted? 
2- Will warp1 be put into a memory access waiting queue; once this operation is completed, the warp is then moved into the runnable queue? 
3- will the Instruction pointer be incremented automatically to annotate that the memory access is done?
 I hope my questions are clear. 
Thank you