static int ipvideo_decode_frame(AVCodecContext *avctx,

                                void *data, int *got_frame,

                                AVPacket *avpkt)

{

    const uint8_t *buf = avpkt->data;

    int buf_size = avpkt->size;

    IpvideoContext *s = avctx->priv_data;

    AVFrame *frame = data;

    int ret;

    int send_buffer;

    int frame_format;

    int video_data_size;

    if (av_packet_get_side_data(avpkt, AV_PKT_DATA_PARAM_CHANGE, NULL)) {

        av_frame_unref(s->last_frame);

        av_frame_unref(s->second_last_frame);

    }

    if (buf_size < 6)

        return AVERROR_INVALIDDATA;

    frame_format         = AV_RL8(buf);

    send_buffer          = AV_RL8(buf + 1);

    video_data_size      = AV_RL16(buf + 2);

    s->decoding_map_size = AV_RL16(buf + 4);

    if (frame_format != 0x11)

        av_log(avctx, AV_LOG_ERROR, "Frame type 0x%02X unsupported\n", frame_format);

    if (! s->decoding_map_size) {

        av_log(avctx, AV_LOG_ERROR, "Empty decoding map\n");

        return AVERROR_INVALIDDATA;

    }

    bytestream2_init(&s->stream_ptr, buf + 6, video_data_size);

    /* decoding map contains 4 bits of information per 8x8 block */

    s->decoding_map = buf + 6 + video_data_size;

    /* ensure we can't overread the packet */

    if (buf_size < 6 + s->decoding_map_size + video_data_size) {

        av_log(avctx, AV_LOG_ERROR, "Invalid IP packet size\n");

        return AVERROR_INVALIDDATA;

    }

    if ((ret = ff_get_buffer(avctx, frame, AV_GET_BUFFER_FLAG_REF)) < 0)

        return ret;

    if (!s->is_16bpp) {

        int size;

        const uint8_t *pal = av_packet_get_side_data(avpkt, AV_PKT_DATA_PALETTE, &size);

        if (pal && size == AVPALETTE_SIZE) {

            frame->palette_has_changed = 1;

            memcpy(s->pal, pal, AVPALETTE_SIZE);

        } else if (pal) {

            av_log(avctx, AV_LOG_ERROR, "Palette size %d is wrong\n", size);

        }

    }

    ipvideo_decode_opcodes(s, frame);

    *got_frame = send_buffer;

    /* shuffle frames */

    av_frame_unref(s->second_last_frame);

    FFSWAP(AVFrame*, s->second_last_frame, s->last_frame);

    if ((ret = av_frame_ref(s->last_frame, frame)) < 0)

        return ret;

    /* report that the buffer was completely consumed */

    return buf_size;

}


static ssize_t fd_put_buffer(void *opaque, const void *data, size_t size)

{

    FdMigrationState *s = opaque;

    ssize_t ret;

    do {

        ret = write(s->fd, data, size);

    } while (ret == -1 && errno == EINTR);

    if (ret == -1)

        ret = -errno;

    if (ret == -EAGAIN)

        qemu_set_fd_handler2(s->fd, NULL, NULL, fd_put_notify, s);

    return ret;

}


static void tap_send(void *opaque)

{

    TAPState *s = opaque;

    int size;

    int packets = 0;

    while (qemu_can_send_packet(&s->nc)) {

        uint8_t *buf = s->buf;

        size = tap_read_packet(s->fd, s->buf, sizeof(s->buf));

        if (size <= 0) {

            break;

        }

        if (s->host_vnet_hdr_len && !s->using_vnet_hdr) {

            buf  += s->host_vnet_hdr_len;

            size -= s->host_vnet_hdr_len;

        }

        size = qemu_send_packet_async(&s->nc, buf, size, tap_send_completed);

        if (size == 0) {

            tap_read_poll(s, false);

            break;

        } else if (size < 0) {

            break;

        }

        /*

         * When the host keeps receiving more packets while tap_send() is

         * running we can hog the QEMU global mutex.  Limit the number of

         * packets that are processed per tap_send() callback to prevent

         * stalling the guest.

         */

        packets++;

        if (packets >= 50) {

            break;

        }

    }

}


pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,

                                BlockDriverState *bs, uint32_t sector_len,

                                int nb_blocs, int width,

                                uint16_t id0, uint16_t id1,

                                uint16_t id2, uint16_t id3)

{

    pflash_t *pfl;

    target_phys_addr_t total_len;

    total_len = sector_len * nb_blocs;

    /* XXX: to be fixed */

#if 0

    if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) &&

        total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024))

        return NULL;

#endif

    pfl = qemu_mallocz(sizeof(pflash_t));

    /* FIXME: Allocate ram ourselves.  */

    pfl->storage = qemu_get_ram_ptr(off);

    pfl->fl_mem = cpu_register_io_memory(

                    pflash_read_ops, pflash_write_ops, pfl);

    pfl->off = off;

    cpu_register_physical_memory(base, total_len,

                    off | pfl->fl_mem | IO_MEM_ROMD);

    pfl->bs = bs;

    if (pfl->bs) {

        /* read the initial flash content */

        bdrv_read(pfl->bs, 0, pfl->storage, total_len >> 9);

    }

#if 0 /* XXX: there should be a bit to set up read-only,

       *      the same way the hardware does (with WP pin).

       */

    pfl->ro = 1;

#else

    pfl->ro = 0;

#endif

    pfl->timer = qemu_new_timer(vm_clock, pflash_timer, pfl);

    pfl->base = base;

    pfl->sector_len = sector_len;

    pfl->total_len = total_len;

    pfl->width = width;

    pfl->wcycle = 0;

    pfl->cmd = 0;

    pfl->status = 0;

    pfl->ident[0] = id0;

    pfl->ident[1] = id1;

    pfl->ident[2] = id2;

    pfl->ident[3] = id3;

    /* Hardcoded CFI table */

    pfl->cfi_len = 0x52;

    /* Standard "QRY" string */

    pfl->cfi_table[0x10] = 'Q';

    pfl->cfi_table[0x11] = 'R';

    pfl->cfi_table[0x12] = 'Y';

    /* Command set (Intel) */

    pfl->cfi_table[0x13] = 0x01;

    pfl->cfi_table[0x14] = 0x00;

    /* Primary extended table address (none) */

    pfl->cfi_table[0x15] = 0x31;

    pfl->cfi_table[0x16] = 0x00;

    /* Alternate command set (none) */

    pfl->cfi_table[0x17] = 0x00;

    pfl->cfi_table[0x18] = 0x00;

    /* Alternate extended table (none) */

    pfl->cfi_table[0x19] = 0x00;

    pfl->cfi_table[0x1A] = 0x00;

    /* Vcc min */

    pfl->cfi_table[0x1B] = 0x45;

    /* Vcc max */

    pfl->cfi_table[0x1C] = 0x55;

    /* Vpp min (no Vpp pin) */

    pfl->cfi_table[0x1D] = 0x00;

    /* Vpp max (no Vpp pin) */

    pfl->cfi_table[0x1E] = 0x00;

    /* Reserved */

    pfl->cfi_table[0x1F] = 0x07;

    /* Timeout for min size buffer write */

    pfl->cfi_table[0x20] = 0x07;

    /* Typical timeout for block erase */

    pfl->cfi_table[0x21] = 0x0a;

    /* Typical timeout for full chip erase (4096 ms) */

    pfl->cfi_table[0x22] = 0x00;

    /* Reserved */

    pfl->cfi_table[0x23] = 0x04;

    /* Max timeout for buffer write */

    pfl->cfi_table[0x24] = 0x04;

    /* Max timeout for block erase */

    pfl->cfi_table[0x25] = 0x04;

    /* Max timeout for chip erase */

    pfl->cfi_table[0x26] = 0x00;

    /* Device size */

    pfl->cfi_table[0x27] = ctz32(total_len); // + 1;

    /* Flash device interface (8 & 16 bits) */

    pfl->cfi_table[0x28] = 0x02;

    pfl->cfi_table[0x29] = 0x00;

    /* Max number of bytes in multi-bytes write */

    pfl->cfi_table[0x2A] = 0x0B;

    pfl->cfi_table[0x2B] = 0x00;

    /* Number of erase block regions (uniform) */

    pfl->cfi_table[0x2C] = 0x01;

    /* Erase block region 1 */

    pfl->cfi_table[0x2D] = nb_blocs - 1;

    pfl->cfi_table[0x2E] = (nb_blocs - 1) >> 8;

    pfl->cfi_table[0x2F] = sector_len >> 8;

    pfl->cfi_table[0x30] = sector_len >> 16;

    /* Extended */

    pfl->cfi_table[0x31] = 'P';

    pfl->cfi_table[0x32] = 'R';

    pfl->cfi_table[0x33] = 'I';

    pfl->cfi_table[0x34] = '1';

    pfl->cfi_table[0x35] = '1';

    pfl->cfi_table[0x36] = 0x00;

    pfl->cfi_table[0x37] = 0x00;

    pfl->cfi_table[0x38] = 0x00;

    pfl->cfi_table[0x39] = 0x00;

    pfl->cfi_table[0x3a] = 0x00;

    pfl->cfi_table[0x3b] = 0x00;

    pfl->cfi_table[0x3c] = 0x00;

    return pfl;

}


static void sigp_set_prefix(CPUState *cs, run_on_cpu_data arg)

{

    S390CPU *cpu = S390_CPU(cs);

    SigpInfo *si = arg.host_ptr;

    uint32_t addr = si->param & 0x7fffe000u;

    cpu_synchronize_state(cs);

    if (!address_space_access_valid(&address_space_memory, addr,

                                    sizeof(struct LowCore), false)) {

        set_sigp_status(si, SIGP_STAT_INVALID_PARAMETER);

        return;

    }

    /* cpu has to be stopped */

    if (s390_cpu_get_state(cpu) != CPU_STATE_STOPPED) {

        set_sigp_status(si, SIGP_STAT_INCORRECT_STATE);

        return;

    }

    cpu->env.psa = addr;

    cpu_synchronize_post_init(cs);

    si->cc = SIGP_CC_ORDER_CODE_ACCEPTED;

}


static void memory_map_init(void)

{

    system_memory = qemu_malloc(sizeof(*system_memory));

    memory_region_init(system_memory, "system", UINT64_MAX);

    set_system_memory_map(system_memory);

}


static void qxl_realize_primary(PCIDevice *dev, Error **errp)

{

    PCIQXLDevice *qxl = PCI_QXL(dev);

    VGACommonState *vga = &qxl->vga;

    Error *local_err = NULL;

    qxl->id = 0;

    qxl_init_ramsize(qxl);

    vga->vbe_size = qxl->vgamem_size;

    vga->vram_size_mb = qxl->vga.vram_size >> 20;

    vga_common_init(vga, OBJECT(dev), true);

    vga_init(vga, OBJECT(dev),

             pci_address_space(dev), pci_address_space_io(dev), false);

    portio_list_init(&qxl->vga_port_list, OBJECT(dev), qxl_vga_portio_list,

                     vga, "vga");

    portio_list_set_flush_coalesced(&qxl->vga_port_list);

    portio_list_add(&qxl->vga_port_list, pci_address_space_io(dev), 0x3b0);

    vga->con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl);

    qemu_spice_display_init_common(&qxl->ssd);

    qxl_realize_common(qxl, &local_err);

    if (local_err) {

        error_propagate(errp, local_err);

        return;

    }

    qxl->ssd.dcl.ops = &display_listener_ops;

    qxl->ssd.dcl.con = vga->con;

    register_displaychangelistener(&qxl->ssd.dcl);

}


const char *path(const char *name)

{

    /* Only do absolute paths: quick and dirty, but should mostly be OK.

       Could do relative by tracking cwd. */

    if (!base || name[0] != '/')

	return name;

    return follow_path(base, name) ?: name;

}


static int aac_decode_er_frame(AVCodecContext *avctx, void *data,

                               int *got_frame_ptr, GetBitContext *gb)

{

    AACContext *ac = avctx->priv_data;

    const MPEG4AudioConfig *const m4ac = &ac->oc[1].m4ac;

    ChannelElement *che;

    int err, i;

    int samples = m4ac->frame_length_short ? 960 : 1024;

    int chan_config = m4ac->chan_config;

    int aot = m4ac->object_type;

    if (aot == AOT_ER_AAC_LD || aot == AOT_ER_AAC_ELD)

        samples >>= 1;

    ac->frame = data;

    if ((err = frame_configure_elements(avctx)) < 0)

        return err;

    // The FF_PROFILE_AAC_* defines are all object_type - 1

    // This may lead to an undefined profile being signaled

    ac->avctx->profile = aot - 1;

    ac->tags_mapped = 0;

    if (chan_config < 0 || (chan_config >= 8 && chan_config < 11) || chan_config >= 13) {

        avpriv_request_sample(avctx, "Unknown ER channel configuration %d",

                              chan_config);

        return AVERROR_INVALIDDATA;

    }

    for (i = 0; i < tags_per_config[chan_config]; i++) {

        const int elem_type = aac_channel_layout_map[chan_config-1][i][0];

        const int elem_id   = aac_channel_layout_map[chan_config-1][i][1];

        if (!(che=get_che(ac, elem_type, elem_id))) {

            av_log(ac->avctx, AV_LOG_ERROR,

                   "channel element %d.%d is not allocated\n",

                   elem_type, elem_id);

            return AVERROR_INVALIDDATA;

        }

        che->present = 1;

        if (aot != AOT_ER_AAC_ELD)

            skip_bits(gb, 4);

        switch (elem_type) {

        case TYPE_SCE:

            err = decode_ics(ac, &che->ch[0], gb, 0, 0);

            break;

        case TYPE_CPE:

            err = decode_cpe(ac, gb, che);

            break;

        case TYPE_LFE:

            err = decode_ics(ac, &che->ch[0], gb, 0, 0);

            break;

        }

        if (err < 0)

            return err;

    }

    spectral_to_sample(ac);

    ac->frame->nb_samples = samples;

    ac->frame->sample_rate = avctx->sample_rate;

    *got_frame_ptr = 1;

    skip_bits_long(gb, get_bits_left(gb));

    return 0;

}


static void versatile_init(MachineState *machine, int board_id)
{
    ObjectClass *cpu_oc;
    Object *cpuobj;
    ARMCPU *cpu;
    MemoryRegion *sysmem = get_system_memory();
    MemoryRegion *ram = g_new(MemoryRegion, 1);
    qemu_irq pic[32];
    qemu_irq sic[32];
    DeviceState *dev, *sysctl;
    SysBusDevice *busdev;
    DeviceState *pl041;
    PCIBus *pci_bus;
    NICInfo *nd;
    I2CBus *i2c;
    int n;
    int done_smc = 0;
    DriveInfo *dinfo;
    if (!machine->cpu_model) {
        machine->cpu_model = "arm926";
    cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, machine->cpu_model);
    if (!cpu_oc) {
        fprintf(stderr, "Unable to find CPU definition\n");
    cpuobj = object_new(object_class_get_name(cpu_oc));
    /* By default ARM1176 CPUs have EL3 enabled.  This board does not
     * currently support EL3 so the CPU EL3 property is disabled before
     * realization.
    if (object_property_find(cpuobj, "has_el3", NULL)) {
        object_property_set_bool(cpuobj, false, "has_el3", &error_fatal);
    object_property_set_bool(cpuobj, true, "realized", &error_fatal);
    cpu = ARM_CPU(cpuobj);
    memory_region_allocate_system_memory(ram, NULL, "versatile.ram",
                                         machine->ram_size);
    /* ??? RAM should repeat to fill physical memory space.  */
    /* SDRAM at address zero.  */
    memory_region_add_subregion(sysmem, 0, ram);
    sysctl = qdev_create(NULL, "realview_sysctl");
    qdev_prop_set_uint32(sysctl, "sys_id", 0x41007004);
    qdev_prop_set_uint32(sysctl, "proc_id", 0x02000000);
    qdev_init_nofail(sysctl);
    sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, 0x10000000);
    dev = sysbus_create_varargs("pl190", 0x10140000,
                                qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ),
                                qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ),
                                NULL);
    for (n = 0; n < 32; n++) {
        pic[n] = qdev_get_gpio_in(dev, n);
    dev = sysbus_create_simple(TYPE_VERSATILE_PB_SIC, 0x10003000, NULL);
    for (n = 0; n < 32; n++) {
        sysbus_connect_irq(SYS_BUS_DEVICE(dev), n, pic[n]);
        sic[n] = qdev_get_gpio_in(dev, n);
    sysbus_create_simple("pl050_keyboard", 0x10006000, sic[3]);
    sysbus_create_simple("pl050_mouse", 0x10007000, sic[4]);
    dev = qdev_create(NULL, "versatile_pci");
    busdev = SYS_BUS_DEVICE(dev);
    qdev_init_nofail(dev);
    sysbus_mmio_map(busdev, 0, 0x10001000); /* PCI controller regs */
    sysbus_mmio_map(busdev, 1, 0x41000000); /* PCI self-config */
    sysbus_mmio_map(busdev, 2, 0x42000000); /* PCI config */
    sysbus_mmio_map(busdev, 3, 0x43000000); /* PCI I/O */
    sysbus_mmio_map(busdev, 4, 0x44000000); /* PCI memory window 1 */
    sysbus_mmio_map(busdev, 5, 0x50000000); /* PCI memory window 2 */
    sysbus_mmio_map(busdev, 6, 0x60000000); /* PCI memory window 3 */
    sysbus_connect_irq(busdev, 0, sic[27]);
    sysbus_connect_irq(busdev, 1, sic[28]);
    sysbus_connect_irq(busdev, 2, sic[29]);
    sysbus_connect_irq(busdev, 3, sic[30]);
    pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
    for(n = 0; n < nb_nics; n++) {
        nd = &nd_table[n];
        if (!done_smc && (!nd->model || strcmp(nd->model, "smc91c111") == 0)) {
            smc91c111_init(nd, 0x10010000, sic[25]);
            done_smc = 1;
        } else {
            pci_nic_init_nofail(nd, pci_bus, "rtl8139", NULL);
    if (machine_usb(machine)) {
        pci_create_simple(pci_bus, -1, "pci-ohci");
    n = drive_get_max_bus(IF_SCSI);
    while (n >= 0) {
        pci_create_simple(pci_bus, -1, "lsi53c895a");
        n--;
    pl011_create(0x101f1000, pic[12], serial_hds[0]);
    pl011_create(0x101f2000, pic[13], serial_hds[1]);
    pl011_create(0x101f3000, pic[14], serial_hds[2]);
    pl011_create(0x10009000, sic[6], serial_hds[3]);
    sysbus_create_simple("pl080", 0x10130000, pic[17]);
    sysbus_create_simple("sp804", 0x101e2000, pic[4]);
    sysbus_create_simple("sp804", 0x101e3000, pic[5]);
    sysbus_create_simple("pl061", 0x101e4000, pic[6]);
    sysbus_create_simple("pl061", 0x101e5000, pic[7]);
    sysbus_create_simple("pl061", 0x101e6000, pic[8]);
    sysbus_create_simple("pl061", 0x101e7000, pic[9]);
    /* The versatile/PB actually has a modified Color LCD controller
       that includes hardware cursor support from the PL111.  */
    dev = sysbus_create_simple("pl110_versatile", 0x10120000, pic[16]);
    /* Wire up the mux control signals from the SYS_CLCD register */
    qdev_connect_gpio_out(sysctl, 0, qdev_get_gpio_in(dev, 0));
    sysbus_create_varargs("pl181", 0x10005000, sic[22], sic[1], NULL);
    sysbus_create_varargs("pl181", 0x1000b000, sic[23], sic[2], NULL);
    /* Add PL031 Real Time Clock. */
    sysbus_create_simple("pl031", 0x101e8000, pic[10]);
    dev = sysbus_create_simple("versatile_i2c", 0x10002000, NULL);
    i2c = (I2CBus *)qdev_get_child_bus(dev, "i2c");
    i2c_create_slave(i2c, "ds1338", 0x68);
    /* Add PL041 AACI Interface to the LM4549 codec */
    pl041 = qdev_create(NULL, "pl041");
    qdev_prop_set_uint32(pl041, "nc_fifo_depth", 512);
    qdev_init_nofail(pl041);
    sysbus_mmio_map(SYS_BUS_DEVICE(pl041), 0, 0x10004000);
    sysbus_connect_irq(SYS_BUS_DEVICE(pl041), 0, sic[24]);
    /* Memory map for Versatile/PB:  */
    /* 0x10000000 System registers.  */
    /* 0x10001000 PCI controller config registers.  */
    /* 0x10002000 Serial bus interface.  */
    /*  0x10003000 Secondary interrupt controller.  */
    /* 0x10004000 AACI (audio).  */
    /*  0x10005000 MMCI0.  */
    /*  0x10006000 KMI0 (keyboard).  */
    /*  0x10007000 KMI1 (mouse).  */
    /* 0x10008000 Character LCD Interface.  */
    /*  0x10009000 UART3.  */
    /* 0x1000a000 Smart card 1.  */
    /*  0x1000b000 MMCI1.  */
    /*  0x10010000 Ethernet.  */
    /* 0x10020000 USB.  */
    /* 0x10100000 SSMC.  */
    /* 0x10110000 MPMC.  */
    /*  0x10120000 CLCD Controller.  */
    /*  0x10130000 DMA Controller.  */
    /*  0x10140000 Vectored interrupt controller.  */
    /* 0x101d0000 AHB Monitor Interface.  */
    /* 0x101e0000 System Controller.  */
    /* 0x101e1000 Watchdog Interface.  */
    /* 0x101e2000 Timer 0/1.  */
    /* 0x101e3000 Timer 2/3.  */
    /* 0x101e4000 GPIO port 0.  */
    /* 0x101e5000 GPIO port 1.  */
    /* 0x101e6000 GPIO port 2.  */
    /* 0x101e7000 GPIO port 3.  */
    /* 0x101e8000 RTC.  */
    /* 0x101f0000 Smart card 0.  */
    /*  0x101f1000 UART0.  */
    /*  0x101f2000 UART1.  */
    /*  0x101f3000 UART2.  */
    /* 0x101f4000 SSPI.  */
    /* 0x34000000 NOR Flash */
    dinfo = drive_get(IF_PFLASH, 0, 0);
    if (!pflash_cfi01_register(VERSATILE_FLASH_ADDR, NULL, "versatile.flash",
                          VERSATILE_FLASH_SIZE,
                          dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
                          VERSATILE_FLASH_SECT_SIZE,
                          VERSATILE_FLASH_SIZE / VERSATILE_FLASH_SECT_SIZE,
                          4, 0x0089, 0x0018, 0x0000, 0x0, 0)) {
        fprintf(stderr, "qemu: Error registering flash memory.\n");
    versatile_binfo.ram_size = machine->ram_size;
    versatile_binfo.kernel_filename = machine->kernel_filename;
    versatile_binfo.kernel_cmdline = machine->kernel_cmdline;
    versatile_binfo.initrd_filename = machine->initrd_filename;
    versatile_binfo.board_id = board_id;
    arm_load_kernel(cpu, &versatile_binfo);


int css_do_ssch(SubchDev *sch, ORB *orb)

{

    SCSW *s = &sch->curr_status.scsw;

    PMCW *p = &sch->curr_status.pmcw;

    int ret;

    if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) {

        ret = -ENODEV;

        goto out;

    }

    if (s->ctrl & SCSW_STCTL_STATUS_PEND) {

        ret = -EINPROGRESS;

        goto out;

    }

    if (s->ctrl & (SCSW_FCTL_START_FUNC |

                   SCSW_FCTL_HALT_FUNC |

                   SCSW_FCTL_CLEAR_FUNC)) {

        ret = -EBUSY;

        goto out;

    }

    /* If monitoring is active, update counter. */

    if (channel_subsys.chnmon_active) {

        css_update_chnmon(sch);

    }

    sch->orb = *orb;

    sch->channel_prog = orb->cpa;

    /* Trigger the start function. */

    s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND);

    s->flags &= ~SCSW_FLAGS_MASK_PNO;

    ret = do_subchannel_work(sch);

out:

    return ret;

}


static int mxf_edit_unit_absolute_offset(MXFContext *mxf, MXFIndexTable *index_table, int64_t edit_unit, int64_t *edit_unit_out, int64_t *offset_out, int nag)

{

    int i;

    int offset_temp = 0;

    for (i = 0; i < index_table->nb_segments; i++) {

        MXFIndexTableSegment *s = index_table->segments[i];

        edit_unit = FFMAX(edit_unit, s->index_start_position);  /* clamp if trying to seek before start */

        if (edit_unit < s->index_start_position + s->index_duration) {

            int64_t index = edit_unit - s->index_start_position;

            if (s->edit_unit_byte_count)

                offset_temp += s->edit_unit_byte_count * index;

            else if (s->nb_index_entries) {

                if (s->nb_index_entries == 2 * s->index_duration + 1)

                    index *= 2;     /* Avid index */

                if (index < 0 || index > s->nb_index_entries) {

                    av_log(mxf->fc, AV_LOG_ERROR, "IndexSID %i segment at %"PRId64" IndexEntryArray too small\n",

                           index_table->index_sid, s->index_start_position);

                    return AVERROR_INVALIDDATA;

                }

                offset_temp = s->stream_offset_entries[index];

            } else {

                av_log(mxf->fc, AV_LOG_ERROR, "IndexSID %i segment at %"PRId64" missing EditUnitByteCount and IndexEntryArray\n",

                       index_table->index_sid, s->index_start_position);

                return AVERROR_INVALIDDATA;

            }

            if (edit_unit_out)

                *edit_unit_out = edit_unit;

            return mxf_absolute_bodysid_offset(mxf, index_table->body_sid, offset_temp, offset_out);

        } else {

            /* EditUnitByteCount == 0 for VBR indexes, which is fine since they use explicit StreamOffsets */

            offset_temp += s->edit_unit_byte_count * s->index_duration;

        }

    }

    if (nag)

        av_log(mxf->fc, AV_LOG_ERROR, "failed to map EditUnit %"PRId64" in IndexSID %i to an offset\n", edit_unit, index_table->index_sid);

    return AVERROR_INVALIDDATA;

}


QEMUPutLEDEntry *qemu_add_led_event_handler(QEMUPutLEDEvent *func,

                                            void *opaque)

{

    QEMUPutLEDEntry *s;

    s = g_malloc0(sizeof(QEMUPutLEDEntry));

    s->put_led = func;

    s->opaque = opaque;

    QTAILQ_INSERT_TAIL(&led_handlers, s, next);

    return s;

}


static int mp3_read_probe(AVProbeData *p)

{

    int max_frames, first_frames;

    int fsize, frames, sample_rate;

    uint32_t header;

    uint8_t *buf, *buf2, *end;

    AVCodecContext avctx;

    if(id3v2_match(p->buf))

        return AVPROBE_SCORE_MAX/2+1; // this must be less than mpeg-ps because some retards put id3v2 tags before mpeg-ps files

    max_frames = 0;

    buf = p->buf;

    end = buf + FFMIN(4096, p->buf_size - sizeof(uint32_t));

    for(; buf < end; buf++) {

        buf2 = buf;

        for(frames = 0; buf2 < end; frames++) {

            header = AV_RB32(buf2);

            fsize = ff_mpa_decode_header(&avctx, header, &sample_rate);

            if(fsize < 0)

                break;

            buf2 += fsize;

        }

        max_frames = FFMAX(max_frames, frames);

        if(buf == p->buf)

            first_frames= frames;

    }

    if   (first_frames>=3) return AVPROBE_SCORE_MAX/2+1;

    else if(max_frames>=3) return AVPROBE_SCORE_MAX/4;

    else if(max_frames>=1) return 1;

    else                   return 0;

}


static ImageInfoSpecific *qcow2_get_specific_info(BlockDriverState *bs)

{

    BDRVQcow2State *s = bs->opaque;

    ImageInfoSpecific *spec_info = g_new(ImageInfoSpecific, 1);

    *spec_info = (ImageInfoSpecific){

        .type  = IMAGE_INFO_SPECIFIC_KIND_QCOW2,

        .u.qcow2.data = g_new(ImageInfoSpecificQCow2, 1),

    };

    if (s->qcow_version == 2) {

        *spec_info->u.qcow2.data = (ImageInfoSpecificQCow2){

            .compat             = g_strdup("0.10"),

            .refcount_bits      = s->refcount_bits,

        };

    } else if (s->qcow_version == 3) {

        *spec_info->u.qcow2.data = (ImageInfoSpecificQCow2){

            .compat             = g_strdup("1.1"),

            .lazy_refcounts     = s->compatible_features &

                                  QCOW2_COMPAT_LAZY_REFCOUNTS,

            .has_lazy_refcounts = true,

            .corrupt            = s->incompatible_features &

                                  QCOW2_INCOMPAT_CORRUPT,

            .has_corrupt        = true,

            .refcount_bits      = s->refcount_bits,

        };

    } else {

        /* if this assertion fails, this probably means a new version was

         * added without having it covered here */

        assert(false);

    }

    return spec_info;

}


static int gif_video_probe(AVProbeData * pd)

{

    const uint8_t *p, *p_end;

    int bits_per_pixel, has_global_palette, ext_code, ext_len;

    int gce_flags, gce_disposal;

    if (pd->buf_size < 24 ||

        memcmp(pd->buf, gif89a_sig, 6) != 0)

        return 0;

    p_end = pd->buf + pd->buf_size;

    p = pd->buf + 6;

    bits_per_pixel = (p[4] & 0x07) + 1;

    has_global_palette = (p[4] & 0x80);

    p += 7;

    if (has_global_palette)

        p += (1 << bits_per_pixel) * 3;

    for(;;) {

        if (p >= p_end)

            return 0;

        if (*p != '!')

            break;

        p++;

        if (p >= p_end)

            return 0;

        ext_code = *p++;

        if (p >= p_end)

            return 0;

        ext_len = *p++;

        if (ext_code == 0xf9) {

            if (p >= p_end)

                return 0;

            /* if GCE extension found with gce_disposal != 0: it is

               likely to be an animation */

            gce_flags = *p++;

            gce_disposal = (gce_flags >> 2) & 0x7;

            if (gce_disposal != 0)

                return AVPROBE_SCORE_MAX;

            else

                return 0;

        }

        for(;;) {

            if (ext_len == 0)

                break;

            p += ext_len;

            if (p >= p_end)

                return 0;

            ext_len = *p++;

        }

    }

    return 0;

}


static int vcr2_init_sequence(AVCodecContext *avctx)

{

    Mpeg1Context *s1  = avctx->priv_data;

    MpegEncContext *s = &s1->mpeg_enc_ctx;

    int i, v, ret;

    /* start new MPEG-1 context decoding */

    s->out_format = FMT_MPEG1;

    if (s1->mpeg_enc_ctx_allocated) {

        ff_mpv_common_end(s);

    }

    s->width            = avctx->coded_width;

    s->height           = avctx->coded_height;

    avctx->has_b_frames = 0; // true?

    s->low_delay        = 1;

    avctx->pix_fmt = mpeg_get_pixelformat(avctx);

#if FF_API_XVMC

    if ((avctx->pix_fmt == AV_PIX_FMT_XVMC_MPEG2_IDCT || avctx->hwaccel) &&

        avctx->idct_algo == FF_IDCT_AUTO)

#else

    if (avctx->hwaccel && avctx->idct_algo == FF_IDCT_AUTO)

#endif /* FF_API_XVMC */

        avctx->idct_algo = FF_IDCT_SIMPLE;

    ff_mpv_idct_init(s);

    if ((ret = ff_mpv_common_init(s)) < 0)

        return ret;

    s1->mpeg_enc_ctx_allocated = 1;

    for (i = 0; i < 64; i++) {

        int j = s->idsp.idct_permutation[i];

        v = ff_mpeg1_default_intra_matrix[i];

        s->intra_matrix[j]        = v;

        s->chroma_intra_matrix[j] = v;

        v = ff_mpeg1_default_non_intra_matrix[i];

        s->inter_matrix[j]        = v;

        s->chroma_inter_matrix[j] = v;

    }

    s->progressive_sequence  = 1;

    s->progressive_frame     = 1;

    s->picture_structure     = PICT_FRAME;

    s->frame_pred_frame_dct  = 1;

    s->chroma_format         = 1;

    s->codec_id              = s->avctx->codec_id = AV_CODEC_ID_MPEG2VIDEO;

    s1->save_width           = s->width;

    s1->save_height          = s->height;

    s1->save_progressive_seq = s->progressive_sequence;

    return 0;

}


static void writer_print_time(WriterContext *wctx, const char *key,

                              int64_t ts, const AVRational *time_base, int is_duration)

{

    char buf[128];

    if ((!is_duration && ts == AV_NOPTS_VALUE) || (is_duration && ts == 0)) {

        writer_print_string(wctx, key, "N/A", 1);

    } else {

        double d = ts * av_q2d(*time_base);

        struct unit_value uv;

        uv.val.d = d;

        uv.unit = unit_second_str;

        value_string(buf, sizeof(buf), uv);

        writer_print_string(wctx, key, buf, 0);

    }

}


static void fill_yuv_image(AVFrame *pict, int frame_index,

                           int width, int height)

{

    int x, y, i, ret;

    /* when we pass a frame to the encoder, it may keep a reference to it

     * internally;

     * make sure we do not overwrite it here

     */

    ret = av_frame_make_writable(pict);

    if (ret < 0)

        exit(1);

    i = frame_index;

    /* Y */

    for (y = 0; y < height; y++)

        for (x = 0; x < width; x++)

            pict->data[0][y * pict->linesize[0] + x] = x + y + i * 3;

    /* Cb and Cr */

    for (y = 0; y < height / 2; y++) {

        for (x = 0; x < width / 2; x++) {

            pict->data[1][y * pict->linesize[1] + x] = 128 + y + i * 2;

            pict->data[2][y * pict->linesize[2] + x] = 64 + x + i * 5;

        }

    }

}


static int get_int32(QEMUFile *f, void *pv, size_t size)

{

    int32_t *v = pv;

    qemu_get_sbe32s(f, v);

    return 0;

}


static long do_rt_sigreturn_v1(CPUARMState *env)

{

    abi_ulong frame_addr;

    struct rt_sigframe_v1 *frame = NULL;

    sigset_t host_set;

    /*

     * Since we stacked the signal on a 64-bit boundary,

     * then 'sp' should be word aligned here.  If it's

     * not, then the user is trying to mess with us.

     */

    frame_addr = env->regs[13];

    trace_user_do_rt_sigreturn(env, frame_addr);

    if (frame_addr & 7) {

        goto badframe;

    }

    if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) {

        goto badframe;

    }

    target_to_host_sigset(&host_set, &frame->uc.tuc_sigmask);

    set_sigmask(&host_set);

    if (restore_sigcontext(env, &frame->uc.tuc_mcontext)) {

        goto badframe;

    }

    if (do_sigaltstack(frame_addr + offsetof(struct rt_sigframe_v1, uc.tuc_stack), 0, get_sp_from_cpustate(env)) == -EFAULT)

        goto badframe;

#if 0

    /* Send SIGTRAP if we're single-stepping */

    if (ptrace_cancel_bpt(current))

        send_sig(SIGTRAP, current, 1);

#endif

    unlock_user_struct(frame, frame_addr, 0);

    return -TARGET_QEMU_ESIGRETURN;

badframe:

    unlock_user_struct(frame, frame_addr, 0);

    force_sig(TARGET_SIGSEGV /* , current */);

    return 0;

}


static int decode_q_branch(SnowContext *s, int level, int x, int y){

    const int w= s->b_width << s->block_max_depth;

    const int rem_depth= s->block_max_depth - level;

    const int index= (x + y*w) << rem_depth;

    int trx= (x+1)<<rem_depth;

    const BlockNode *left  = x ? &s->block[index-1] : &null_block;

    const BlockNode *top   = y ? &s->block[index-w] : &null_block;

    const BlockNode *tl    = y && x ? &s->block[index-w-1] : left;

    const BlockNode *tr    = y && trx<w && ((x&1)==0 || level==0) ? &s->block[index-w+(1<<rem_depth)] : tl; //FIXME use lt

    int s_context= 2*left->level + 2*top->level + tl->level + tr->level;

    int res;

    if(s->keyframe){

        set_blocks(s, level, x, y, null_block.color[0], null_block.color[1], null_block.color[2], null_block.mx, null_block.my, null_block.ref, BLOCK_INTRA);

        return 0;

    }

    if(level==s->block_max_depth || get_rac(&s->c, &s->block_state[4 + s_context])){

        int type, mx, my;

        int l = left->color[0];

        int cb= left->color[1];

        int cr= left->color[2];

        unsigned ref = 0;

        int ref_context= av_log2(2*left->ref) + av_log2(2*top->ref);

        int mx_context= av_log2(2*FFABS(left->mx - top->mx)) + 0*av_log2(2*FFABS(tr->mx - top->mx));

        int my_context= av_log2(2*FFABS(left->my - top->my)) + 0*av_log2(2*FFABS(tr->my - top->my));

        type= get_rac(&s->c, &s->block_state[1 + left->type + top->type]) ? BLOCK_INTRA : 0;

        if(type){

            pred_mv(s, &mx, &my, 0, left, top, tr);

            l += get_symbol(&s->c, &s->block_state[32], 1);

            if (s->nb_planes > 2) {

                cb+= get_symbol(&s->c, &s->block_state[64], 1);

                cr+= get_symbol(&s->c, &s->block_state[96], 1);

            }

        }else{

            if(s->ref_frames > 1)

                ref= get_symbol(&s->c, &s->block_state[128 + 1024 + 32*ref_context], 0);

            if (ref >= s->ref_frames) {

                av_log(s->avctx, AV_LOG_ERROR, "Invalid ref\n");

                return AVERROR_INVALIDDATA;

            }

            pred_mv(s, &mx, &my, ref, left, top, tr);

            mx+= get_symbol(&s->c, &s->block_state[128 + 32*(mx_context + 16*!!ref)], 1);

            my+= get_symbol(&s->c, &s->block_state[128 + 32*(my_context + 16*!!ref)], 1);

        }

        set_blocks(s, level, x, y, l, cb, cr, mx, my, ref, type);

    }else{

        if ((res = decode_q_branch(s, level+1, 2*x+0, 2*y+0)) < 0 ||

            (res = decode_q_branch(s, level+1, 2*x+1, 2*y+0)) < 0 ||

            (res = decode_q_branch(s, level+1, 2*x+0, 2*y+1)) < 0 ||

            (res = decode_q_branch(s, level+1, 2*x+1, 2*y+1)) < 0)

            return res;

    }

    return 0;

}


cl_program av_opencl_compile(const char *program_name, const char *build_opts)

{

    int i;

    cl_int status, build_status;

    int kernel_code_idx = 0;

    const char *kernel_source;

    size_t kernel_code_len;

    char* ptr = NULL;

    cl_program program = NULL;

    size_t log_size;

    char *log = NULL;

    LOCK_OPENCL;

    for (i = 0; i < opencl_ctx.kernel_code_count; i++) {

        // identify a program using a unique name within the kernel source

        ptr = av_stristr(opencl_ctx.kernel_code[i].kernel_string, program_name);

        if (ptr && !opencl_ctx.kernel_code[i].is_compiled) {

            kernel_source = opencl_ctx.kernel_code[i].kernel_string;

            kernel_code_len = strlen(opencl_ctx.kernel_code[i].kernel_string);

            kernel_code_idx = i;

            break;

        }

    }

    if (!kernel_source) {

        av_log(&opencl_ctx, AV_LOG_ERROR,

               "Unable to find OpenCL kernel source '%s'\n", program_name);

        goto end;

    }

    /* create a CL program from kernel source */

    program = clCreateProgramWithSource(opencl_ctx.context, 1, &kernel_source, &kernel_code_len, &status);

    if(status != CL_SUCCESS) {

        av_log(&opencl_ctx, AV_LOG_ERROR,

               "Unable to create OpenCL program '%s': %s\n", program_name, av_opencl_errstr(status));

        program = NULL;

        goto end;

    }

    build_status = clBuildProgram(program, 1, &(opencl_ctx.device_id), build_opts, NULL, NULL);

    status = clGetProgramBuildInfo(program, opencl_ctx.device_id,

                                   CL_PROGRAM_BUILD_LOG, 0, NULL, &log_size);

    if (status != CL_SUCCESS) {

        av_log(&opencl_ctx, AV_LOG_WARNING,

               "Failed to get compilation log: %s\n",

               av_opencl_errstr(status));

    } else {

        log = av_malloc(log_size);

        if (log) {

            status = clGetProgramBuildInfo(program, opencl_ctx.device_id,

                                           CL_PROGRAM_BUILD_LOG, log_size,

                                           log, NULL);

            if (status != CL_SUCCESS) {

                av_log(&opencl_ctx, AV_LOG_WARNING,

                       "Failed to get compilation log: %s\n",

                       av_opencl_errstr(status));

            } else {

                int level = build_status == CL_SUCCESS ? AV_LOG_DEBUG :

                                                         AV_LOG_ERROR;

                av_log(&opencl_ctx, level, "Compilation log:\n%s\n", log);

            }

        }

        av_freep(&log);

    }

    if (build_status != CL_SUCCESS) {

        av_log(&opencl_ctx, AV_LOG_ERROR,

               "Compilation failed with OpenCL program '%s': %s\n",

               program_name, av_opencl_errstr(build_status));

        program = NULL;

        goto end;

    }

    opencl_ctx.kernel_code[kernel_code_idx].is_compiled = 1;

end:

    UNLOCK_OPENCL;

    return program;

}


static void output_segment_list(OutputStream *os, AVIOContext *out, DASHContext *c)

{

    int i, start_index = 0, start_number = 1;

    if (c->window_size) {

        start_index  = FFMAX(os->nb_segments   - c->window_size, 0);

        start_number = FFMAX(os->segment_index - c->window_size, 1);

    }

    if (c->use_template) {

        int timescale = c->use_timeline ? os->ctx->streams[0]->time_base.den : AV_TIME_BASE;

        avio_printf(out, "\t\t\t\t<SegmentTemplate timescale=\"%d\" ", timescale);

        if (!c->use_timeline)

            avio_printf(out, "duration=\"%d\" ", c->last_duration);

        avio_printf(out, "initialization=\"%s\" media=\"%s\" startNumber=\"%d\">\n", c->init_seg_name, c->media_seg_name, c->use_timeline ? start_number : 1);

        if (c->use_timeline) {

            avio_printf(out, "\t\t\t\t\t<SegmentTimeline>\n");

            for (i = start_index; i < os->nb_segments; ) {

                Segment *seg = os->segments[i];

                int repeat = 0;

                avio_printf(out, "\t\t\t\t\t\t<S ");

                if (i == start_index)

                    avio_printf(out, "t=\"%"PRId64"\" ", seg->time);

                avio_printf(out, "d=\"%d\" ", seg->duration);

                while (i + repeat + 1 < os->nb_segments && os->segments[i + repeat + 1]->duration == seg->duration)

                    repeat++;

                if (repeat > 0)

                    avio_printf(out, "r=\"%d\" ", repeat);

                avio_printf(out, "/>\n");

                i += 1 + repeat;

            }

            avio_printf(out, "\t\t\t\t\t</SegmentTimeline>\n");

        }

        avio_printf(out, "\t\t\t\t</SegmentTemplate>\n");

    } else if (c->single_file) {

        avio_printf(out, "\t\t\t\t<BaseURL>%s</BaseURL>\n", os->initfile);

        avio_printf(out, "\t\t\t\t<SegmentList timescale=\"%d\" duration=\"%d\" startNumber=\"%d\">\n", AV_TIME_BASE, c->last_duration, start_number);

        avio_printf(out, "\t\t\t\t\t<Initialization range=\"%"PRId64"-%"PRId64"\" />\n", os->init_start_pos, os->init_start_pos + os->init_range_length - 1);

        for (i = start_index; i < os->nb_segments; i++) {

            Segment *seg = os->segments[i];

            avio_printf(out, "\t\t\t\t\t<SegmentURL mediaRange=\"%"PRId64"-%"PRId64"\" ", seg->start_pos, seg->start_pos + seg->range_length - 1);

            if (seg->index_length)

                avio_printf(out, "indexRange=\"%"PRId64"-%"PRId64"\" ", seg->start_pos, seg->start_pos + seg->index_length - 1);

            avio_printf(out, "/>\n");

        }

        avio_printf(out, "\t\t\t\t</SegmentList>\n");

    } else {

        avio_printf(out, "\t\t\t\t<SegmentList timescale=\"%d\" duration=\"%d\" startNumber=\"%d\">\n", AV_TIME_BASE, c->last_duration, start_number);

        avio_printf(out, "\t\t\t\t\t<Initialization sourceURL=\"%s\" />\n", os->initfile);

        for (i = start_index; i < os->nb_segments; i++) {

            Segment *seg = os->segments[i];

            avio_printf(out, "\t\t\t\t\t<SegmentURL media=\"%s\" />\n", seg->file);

        }

        avio_printf(out, "\t\t\t\t</SegmentList>\n");

    }

}


int av_cold ff_ivi_init_tiles(IVIPlaneDesc *planes, int tile_width, int tile_height)

{

    int         p, b, x, y, x_tiles, y_tiles, t_width, t_height;

    IVIBandDesc *band;

    IVITile     *tile, *ref_tile;

    for (p = 0; p < 3; p++) {

        t_width  = !p ? tile_width  : (tile_width  + 3) >> 2;

        t_height = !p ? tile_height : (tile_height + 3) >> 2;

        if (!p && planes[0].num_bands == 4) {

            t_width  >>= 1;

            t_height >>= 1;

        }

        for (b = 0; b < planes[p].num_bands; b++) {

            band = &planes[p].bands[b];

            x_tiles = IVI_NUM_TILES(band->width, t_width);

            y_tiles = IVI_NUM_TILES(band->height, t_height);

            band->num_tiles = x_tiles * y_tiles;

            av_freep(&band->tiles);

            band->tiles = av_mallocz(band->num_tiles * sizeof(IVITile));

            if (!band->tiles)

                return AVERROR(ENOMEM);

            tile = band->tiles;

            /* use the first luma band as reference for motion vectors

             * and quant */

            ref_tile = planes[0].bands[0].tiles;

            for (y = 0; y < band->height; y += t_height) {

                for (x = 0; x < band->width; x += t_width) {

                    tile->xpos     = x;

                    tile->ypos     = y;

                    tile->width    = FFMIN(band->width - x,  t_width);

                    tile->height   = FFMIN(band->height - y, t_height);

                    tile->is_empty = tile->data_size = 0;

                    /* calculate number of macroblocks */

                    tile->num_MBs  = IVI_MBs_PER_TILE(tile->width, tile->height,

                                                      band->mb_size);

                    av_freep(&tile->mbs);

                    tile->mbs = av_malloc(tile->num_MBs * sizeof(IVIMbInfo));

                    if (!tile->mbs)

                        return AVERROR(ENOMEM);

                    tile->ref_mbs = 0;

                    if (p || b) {

                        tile->ref_mbs = ref_tile->mbs;

                        ref_tile++;

                    }

                    tile++;

                }

            }

        }// for b

    }// for p

    return 0;

}


int spapr_h_cas_compose_response(sPAPRMachineState *spapr,

                                 target_ulong addr, target_ulong size,

                                 bool cpu_update)

{

    void *fdt, *fdt_skel;

    sPAPRDeviceTreeUpdateHeader hdr = { .version_id = 1 };

    sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(qdev_get_machine());

    size -= sizeof(hdr);

    /* Create sceleton */

    fdt_skel = g_malloc0(size);

    _FDT((fdt_create(fdt_skel, size)));

    _FDT((fdt_begin_node(fdt_skel, "")));

    _FDT((fdt_end_node(fdt_skel)));

    _FDT((fdt_finish(fdt_skel)));

    fdt = g_malloc0(size);

    _FDT((fdt_open_into(fdt_skel, fdt, size)));

    g_free(fdt_skel);

    /* Fixup cpu nodes */

    if (cpu_update) {

        _FDT((spapr_fixup_cpu_dt(fdt, spapr)));

    }

    /* Generate ibm,dynamic-reconfiguration-memory node if required */

    if (spapr_ovec_test(spapr->ov5_cas, OV5_DRCONF_MEMORY)) {

        g_assert(smc->dr_lmb_enabled);

        _FDT((spapr_populate_drconf_memory(spapr, fdt)));

    }

    /* Pack resulting tree */

    _FDT((fdt_pack(fdt)));

    if (fdt_totalsize(fdt) + sizeof(hdr) > size) {

        trace_spapr_cas_failed(size);

        return -1;

    }

    cpu_physical_memory_write(addr, &hdr, sizeof(hdr));

    cpu_physical_memory_write(addr + sizeof(hdr), fdt, fdt_totalsize(fdt));

    trace_spapr_cas_continue(fdt_totalsize(fdt) + sizeof(hdr));

    g_free(fdt);

    return 0;

}


int do_store_msr (CPUPPCState *env, target_ulong value)

{

    int enter_pm;

    value &= env->msr_mask;

    if (((value >> MSR_IR) & 1) != msr_ir ||

        ((value >> MSR_DR) & 1) != msr_dr) {

        /* Flush all tlb when changing translation mode */

        tlb_flush(env, 1);

        env->interrupt_request |= CPU_INTERRUPT_EXITTB;

    }

#if !defined (CONFIG_USER_ONLY)

    if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&

                 ((value >> MSR_TGPR) & 1) != msr_tgpr)) {

        /* Swap temporary saved registers with GPRs */

        swap_gpr_tgpr(env);

    }

    if (unlikely((value >> MSR_EP) & 1) != msr_ep) {

        /* Change the exception prefix on PowerPC 601 */

        env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF00000;

    }

#endif

#if defined (TARGET_PPC64)

    msr_sf   = (value >> MSR_SF)   & 1;

    msr_isf  = (value >> MSR_ISF)  & 1;

    msr_hv   = (value >> MSR_HV)   & 1;

#endif

    msr_ucle = (value >> MSR_UCLE) & 1;

    msr_vr   = (value >> MSR_VR)   & 1; /* VR / SPE */

    msr_ap   = (value >> MSR_AP)   & 1;

    msr_sa   = (value >> MSR_SA)   & 1;

    msr_key  = (value >> MSR_KEY)  & 1;

    msr_pow  = (value >> MSR_POW)  & 1; /* POW / WE */

    msr_tgpr = (value >> MSR_TGPR) & 1; /* TGPR / CE */

    msr_ile  = (value >> MSR_ILE)  & 1;

    msr_ee   = (value >> MSR_EE)   & 1;

    msr_pr   = (value >> MSR_PR)   & 1;

    msr_fp   = (value >> MSR_FP)   & 1;

    msr_me   = (value >> MSR_ME)   & 1;

    msr_fe0  = (value >> MSR_FE0)  & 1;

    msr_se   = (value >> MSR_SE)   & 1; /* SE / DWE / UBLE */

    msr_be   = (value >> MSR_BE)   & 1; /* BE / DE */

    msr_fe1  = (value >> MSR_FE1)  & 1;

    msr_al   = (value >> MSR_AL)   & 1;

    msr_ip   = (value >> MSR_IP)   & 1;

    msr_ir   = (value >> MSR_IR)   & 1; /* IR / IS */

    msr_dr   = (value >> MSR_DR)   & 1; /* DR / DS */

    msr_pe   = (value >> MSR_PE)   & 1; /* PE / EP */

    msr_px   = (value >> MSR_PX)   & 1; /* PX / PMM */

    msr_ri   = (value >> MSR_RI)   & 1;

    msr_le   = (value >> MSR_LE)   & 1;

    do_compute_hflags(env);

    enter_pm = 0;

    switch (env->excp_model) {

    case POWERPC_EXCP_603:

    case POWERPC_EXCP_603E:

    case POWERPC_EXCP_G2:

        /* Don't handle SLEEP mode: we should disable all clocks...

         * No dynamic power-management.

         */

        if (msr_pow == 1 && (env->spr[SPR_HID0] & 0x00C00000) != 0)

            enter_pm = 1;

        break;

    case POWERPC_EXCP_604:

        if (msr_pow == 1)

            enter_pm = 1;

        break;

    case POWERPC_EXCP_7x0:

        if (msr_pow == 1 && (env->spr[SPR_HID0] & 0x00E00000) != 0)

            enter_pm = 1;

        break;

    default:

        break;

    }

    return enter_pm;

}


static int filter_frame(AVFilterLink *inlink, AVFrame *insamplesref)

{

    AResampleContext *aresample = inlink->dst->priv;

    const int n_in  = insamplesref->nb_samples;

    int64_t delay;

    int n_out       = n_in * aresample->ratio + 32;

    AVFilterLink *const outlink = inlink->dst->outputs[0];

    AVFrame *outsamplesref;

    int ret;

    delay = swr_get_delay(aresample->swr, outlink->sample_rate);

    if (delay > 0)

        n_out += FFMIN(delay, FFMAX(4096, n_out));

    outsamplesref = ff_get_audio_buffer(outlink, n_out);

    if(!outsamplesref)

        return AVERROR(ENOMEM);

    av_frame_copy_props(outsamplesref, insamplesref);

    outsamplesref->format                = outlink->format;

    outsamplesref->channels              = outlink->channels;

    outsamplesref->channel_layout        = outlink->channel_layout;

    outsamplesref->sample_rate           = outlink->sample_rate;

    if(insamplesref->pts != AV_NOPTS_VALUE) {

        int64_t inpts = av_rescale(insamplesref->pts, inlink->time_base.num * (int64_t)outlink->sample_rate * inlink->sample_rate, inlink->time_base.den);

        int64_t outpts= swr_next_pts(aresample->swr, inpts);

        aresample->next_pts =

        outsamplesref->pts  = ROUNDED_DIV(outpts, inlink->sample_rate);

    } else {

        outsamplesref->pts  = AV_NOPTS_VALUE;

    }

    n_out = swr_convert(aresample->swr, outsamplesref->extended_data, n_out,

                                 (void *)insamplesref->extended_data, n_in);

    if (n_out <= 0) {

        av_frame_free(&outsamplesref);

        av_frame_free(&insamplesref);

        return 0;

    }

    aresample->more_data = outsamplesref->nb_samples == n_out; // Indicate that there is probably more data in our buffers

    outsamplesref->nb_samples  = n_out;

    ret = ff_filter_frame(outlink, outsamplesref);

    av_frame_free(&insamplesref);

    return ret;

}


static void mem_add(MemoryListener *listener, MemoryRegionSection *section)

{

    AddressSpaceDispatch *d = container_of(listener, AddressSpaceDispatch, listener);

    MemoryRegionSection now = *section, remain = *section;

    if ((now.offset_within_address_space & ~TARGET_PAGE_MASK)

        || (now.size < TARGET_PAGE_SIZE)) {

        now.size = MIN(TARGET_PAGE_ALIGN(now.offset_within_address_space)

                       - now.offset_within_address_space,

                       now.size);

        register_subpage(d, &now);

        remain.size -= now.size;

        remain.offset_within_address_space += now.size;

        remain.offset_within_region += now.size;

    }

    while (remain.size >= TARGET_PAGE_SIZE) {

        now = remain;

        if (remain.offset_within_region & ~TARGET_PAGE_MASK) {

            now.size = TARGET_PAGE_SIZE;

            register_subpage(d, &now);

        } else {

            now.size &= TARGET_PAGE_MASK;

            register_multipage(d, &now);

        }

        remain.size -= now.size;

        remain.offset_within_address_space += now.size;

        remain.offset_within_region += now.size;

    }

    now = remain;

    if (now.size) {

        register_subpage(d, &now);

    }

}


static int decode_frame(AVCodecContext *avctx,

                            void *data, int *got_frame,

                            AVPacket *avpkt)

{

    AnsiContext *s = avctx->priv_data;

    uint8_t *buf = avpkt->data;

    int buf_size = avpkt->size;

    const uint8_t *buf_end   = buf+buf_size;

    int ret, i, count;

    if ((ret = ff_reget_buffer(avctx, s->frame)) < 0)

        return ret;

    if (!avctx->frame_number) {

        for (i=0; i<avctx->height; i++)

            memset(s->frame->data[0]+ i*s->frame->linesize[0], 0, avctx->width);

        memset(s->frame->data[1], 0, AVPALETTE_SIZE);

    }

    s->frame->pict_type           = AV_PICTURE_TYPE_I;

    s->frame->palette_has_changed = 1;

    set_palette((uint32_t *)s->frame->data[1]);

    if (!s->first_frame) {

        erase_screen(avctx);

        s->first_frame = 1;

    }

    while(buf < buf_end) {

        switch(s->state) {

        case STATE_NORMAL:

            switch (buf[0]) {

            case 0x00: //NUL

            case 0x07: //BEL

            case 0x1A: //SUB

                /* ignore */

                break;

            case 0x08: //BS

                s->x = FFMAX(s->x - 1, 0);

                break;

            case 0x09: //HT

                i = s->x / FONT_WIDTH;

                count = ((i + 8) & ~7) - i;

                for (i = 0; i < count; i++)

                    draw_char(avctx, ' ');

                break;

            case 0x0A: //LF

                hscroll(avctx);

            case 0x0D: //CR

                s->x = 0;

                break;

            case 0x0C: //FF

                erase_screen(avctx);

                break;

            case 0x1B: //ESC

                s->state = STATE_ESCAPE;

                break;

            default:

                draw_char(avctx, buf[0]);

            }

            break;

        case STATE_ESCAPE:

            if (buf[0] == '[') {

                s->state   = STATE_CODE;

                s->nb_args = 0;

                s->args[0] = -1;

            } else {

                s->state = STATE_NORMAL;

                draw_char(avctx, 0x1B);

                continue;

            }

            break;

        case STATE_CODE:

            switch(buf[0]) {

            case '0': case '1': case '2': case '3': case '4':

            case '5': case '6': case '7': case '8': case '9':

                if (s->nb_args < MAX_NB_ARGS)

                    s->args[s->nb_args] = FFMAX(s->args[s->nb_args], 0) * 10 + buf[0] - '0';

                break;

            case ';':

                s->nb_args++;

                if (s->nb_args < MAX_NB_ARGS)

                    s->args[s->nb_args] = 0;

                break;

            case 'M':

                s->state = STATE_MUSIC_PREAMBLE;

                break;

            case '=': case '?':

                /* ignore */

                break;

            default:

                if (s->nb_args > MAX_NB_ARGS)

                    av_log(avctx, AV_LOG_WARNING, "args overflow (%i)\n", s->nb_args);

                if (s->nb_args < MAX_NB_ARGS && s->args[s->nb_args] >= 0)

                    s->nb_args++;

                if ((ret = execute_code(avctx, buf[0])) < 0)

                    return ret;

                s->state = STATE_NORMAL;

            }

            break;

        case STATE_MUSIC_PREAMBLE:

            if (buf[0] == 0x0E || buf[0] == 0x1B)

                s->state = STATE_NORMAL;

            /* ignore music data */

            break;

        }

        buf++;

    }

    *got_frame = 1;

    if ((ret = av_frame_ref(data, s->frame)) < 0)

        return ret;

    return buf_size;

}


static void load_symbols(struct elfhdr *hdr, int fd)

{

    unsigned int i, nsyms;

    struct elf_shdr sechdr, symtab, strtab;

    char *strings;

    struct syminfo *s;

    struct elf_sym *syms;

    lseek(fd, hdr->e_shoff, SEEK_SET);

    for (i = 0; i < hdr->e_shnum; i++) {

        if (read(fd, &sechdr, sizeof(sechdr)) != sizeof(sechdr))

            return;

#ifdef BSWAP_NEEDED

        bswap_shdr(&sechdr);

#endif

        if (sechdr.sh_type == SHT_SYMTAB) {

            symtab = sechdr;

            lseek(fd, hdr->e_shoff

                  + sizeof(sechdr) * sechdr.sh_link, SEEK_SET);

            if (read(fd, &strtab, sizeof(strtab))

                != sizeof(strtab))

                return;

#ifdef BSWAP_NEEDED

            bswap_shdr(&strtab);

#endif

            goto found;

        }

    }

    return; /* Shouldn't happen... */

 found:

    /* Now know where the strtab and symtab are.  Snarf them. */

    s = malloc(sizeof(*s));

    syms = malloc(symtab.sh_size);

    if (!syms)

        return;

    s->disas_strtab = strings = malloc(strtab.sh_size);

    if (!s->disas_strtab)

        return;

    lseek(fd, symtab.sh_offset, SEEK_SET);

    if (read(fd, syms, symtab.sh_size) != symtab.sh_size)

        return;

    nsyms = symtab.sh_size / sizeof(struct elf_sym);

    i = 0;

    while (i < nsyms) {

#ifdef BSWAP_NEEDED

        bswap_sym(syms + i);

#endif

        // Throw away entries which we do not need.

        if (syms[i].st_shndx == SHN_UNDEF ||

                syms[i].st_shndx >= SHN_LORESERVE ||

                ELF_ST_TYPE(syms[i].st_info) != STT_FUNC) {

            nsyms--;

            if (i < nsyms) {

                syms[i] = syms[nsyms];

            }

            continue;

        }

#if defined(TARGET_ARM) || defined (TARGET_MIPS)

        /* The bottom address bit marks a Thumb or MIPS16 symbol.  */

        syms[i].st_value &= ~(target_ulong)1;

#endif

        i++;

    }

    syms = realloc(syms, nsyms * sizeof(*syms));

    qsort(syms, nsyms, sizeof(*syms), symcmp);

    lseek(fd, strtab.sh_offset, SEEK_SET);

    if (read(fd, strings, strtab.sh_size) != strtab.sh_size)

        return;

    s->disas_num_syms = nsyms;

#if ELF_CLASS == ELFCLASS32

    s->disas_symtab.elf32 = syms;

    s->lookup_symbol = (lookup_symbol_t)lookup_symbolxx;

#else

    s->disas_symtab.elf64 = syms;

    s->lookup_symbol = (lookup_symbol_t)lookup_symbolxx;

#endif

    s->next = syminfos;

    syminfos = s;

}


av_cold int ff_snow_common_init(AVCodecContext *avctx){

    SnowContext *s = avctx->priv_data;

    int width, height;

    int i, j;

    s->avctx= avctx;

    s->max_ref_frames=1; //just make sure it's not an invalid value in case of no initial keyframe

    ff_me_cmp_init(&s->mecc, avctx);

    ff_hpeldsp_init(&s->hdsp, avctx->flags);

    ff_videodsp_init(&s->vdsp, 8);

    ff_dwt_init(&s->dwt);

    ff_h264qpel_init(&s->h264qpel, 8);

#define mcf(dx,dy)\

    s->qdsp.put_qpel_pixels_tab       [0][dy+dx/4]=\

    s->qdsp.put_no_rnd_qpel_pixels_tab[0][dy+dx/4]=\

        s->h264qpel.put_h264_qpel_pixels_tab[0][dy+dx/4];\

    s->qdsp.put_qpel_pixels_tab       [1][dy+dx/4]=\

    s->qdsp.put_no_rnd_qpel_pixels_tab[1][dy+dx/4]=\

        s->h264qpel.put_h264_qpel_pixels_tab[1][dy+dx/4];

    mcf( 0, 0)

    mcf( 4, 0)

    mcf( 8, 0)

    mcf(12, 0)

    mcf( 0, 4)

    mcf( 4, 4)

    mcf( 8, 4)

    mcf(12, 4)

    mcf( 0, 8)

    mcf( 4, 8)

    mcf( 8, 8)

    mcf(12, 8)

    mcf( 0,12)

    mcf( 4,12)

    mcf( 8,12)

    mcf(12,12)

#define mcfh(dx,dy)\

    s->hdsp.put_pixels_tab       [0][dy/4+dx/8]=\

    s->hdsp.put_no_rnd_pixels_tab[0][dy/4+dx/8]=\

        mc_block_hpel ## dx ## dy ## 16;\

    s->hdsp.put_pixels_tab       [1][dy/4+dx/8]=\

    s->hdsp.put_no_rnd_pixels_tab[1][dy/4+dx/8]=\

        mc_block_hpel ## dx ## dy ## 8;

    mcfh(0, 0)

    mcfh(8, 0)

    mcfh(0, 8)

    mcfh(8, 8)

    init_qexp();

//    dec += FFMAX(s->chroma_h_shift, s->chroma_v_shift);

    width= s->avctx->width;

    height= s->avctx->height;

    FF_ALLOCZ_ARRAY_OR_GOTO(avctx, s->spatial_idwt_buffer, width, height * sizeof(IDWTELEM), fail);

    FF_ALLOCZ_ARRAY_OR_GOTO(avctx, s->spatial_dwt_buffer,  width, height * sizeof(DWTELEM),  fail); //FIXME this does not belong here

    FF_ALLOCZ_ARRAY_OR_GOTO(avctx, s->temp_dwt_buffer,     width, sizeof(DWTELEM),  fail);

    FF_ALLOCZ_ARRAY_OR_GOTO(avctx, s->temp_idwt_buffer,    width, sizeof(IDWTELEM), fail);

    FF_ALLOC_ARRAY_OR_GOTO(avctx,  s->run_buffer,          ((width + 1) >> 1), ((height + 1) >> 1) * sizeof(*s->run_buffer), fail);

    for(i=0; i<MAX_REF_FRAMES; i++) {

        for(j=0; j<MAX_REF_FRAMES; j++)

            ff_scale_mv_ref[i][j] = 256*(i+1)/(j+1);

        s->last_picture[i] = av_frame_alloc();

        if (!s->last_picture[i])

            goto fail;

    }

    s->mconly_picture = av_frame_alloc();

    s->current_picture = av_frame_alloc();

    if (!s->mconly_picture || !s->current_picture)

        goto fail;

    return 0;

fail:

    return AVERROR(ENOMEM);

}


static int hdev_open(BlockDriverState *bs, const char *filename, int flags)

{

    BDRVRawState *s = bs->opaque;

#if defined(__APPLE__) && defined(__MACH__)

    if (strstart(filename, "/dev/cdrom", NULL)) {

        kern_return_t kernResult;

        io_iterator_t mediaIterator;

        char bsdPath[ MAXPATHLEN ];

        int fd;

        kernResult = FindEjectableCDMedia( &mediaIterator );

        kernResult = GetBSDPath( mediaIterator, bsdPath, sizeof( bsdPath ) );

        if ( bsdPath[ 0 ] != '\0' ) {

            strcat(bsdPath,"s0");

            /* some CDs don't have a partition 0 */

            fd = qemu_open(bsdPath, O_RDONLY | O_BINARY | O_LARGEFILE);

            if (fd < 0) {

                bsdPath[strlen(bsdPath)-1] = '1';

            } else {

                qemu_close(fd);

            }

            filename = bsdPath;

        }

        if ( mediaIterator )

            IOObjectRelease( mediaIterator );

    }

#endif

    s->type = FTYPE_FILE;

#if defined(__linux__)

    {

        char resolved_path[ MAXPATHLEN ], *temp;

        temp = realpath(filename, resolved_path);

        if (temp && strstart(temp, "/dev/sg", NULL)) {

            bs->sg = 1;

        }

    }

#endif

    return raw_open_common(bs, filename, flags, 0);

}


void kvm_inject_x86_mce(CPUState *cenv, int bank, uint64_t status,

                        uint64_t mcg_status, uint64_t addr, uint64_t misc)

{

#ifdef KVM_CAP_MCE

    struct kvm_x86_mce mce = {

        .bank = bank,

        .status = status,

        .mcg_status = mcg_status,

        .addr = addr,

        .misc = misc,

    };

    struct kvm_x86_mce_data data = {

            .env = cenv,

            .mce = &mce,

    };

    run_on_cpu(cenv, kvm_do_inject_x86_mce, &data);

#endif

}


static int asf_read_marker(AVFormatContext *s, int64_t size)

{

    AVIOContext *pb = s->pb;

    ASFContext *asf = s->priv_data;

    int i, count, name_len, ret;

    char name[1024];

    avio_rl64(pb);            // reserved 16 bytes

    avio_rl64(pb);            // ...

    count = avio_rl32(pb);    // markers count

    avio_rl16(pb);            // reserved 2 bytes

    name_len = avio_rl16(pb); // name length

    for (i = 0; i < name_len; i++)

        avio_r8(pb); // skip the name

    for (i = 0; i < count; i++) {

        int64_t pres_time;

        int name_len;

        avio_rl64(pb);             // offset, 8 bytes

        pres_time = avio_rl64(pb); // presentation time

        pres_time -= asf->hdr.preroll * 10000;

        avio_rl16(pb);             // entry length

        avio_rl32(pb);             // send time

        avio_rl32(pb);             // flags

        name_len = avio_rl32(pb);  // name length

        if ((ret = avio_get_str16le(pb, name_len * 2, name,

                                    sizeof(name))) < name_len)

            avio_skip(pb, name_len - ret);

        avpriv_new_chapter(s, i, (AVRational) { 1, 10000000 }, pres_time,

                           AV_NOPTS_VALUE, name);

    }

    return 0;

}


static void xhci_events_update(XHCIState *xhci, int v)

{

    XHCIInterrupter *intr = &xhci->intr[v];

    dma_addr_t erdp;

    unsigned int dp_idx;

    bool do_irq = 0;

    if (xhci->usbsts & USBSTS_HCH) {

        return;

    }

    erdp = xhci_addr64(intr->erdp_low, intr->erdp_high);

    if (erdp < intr->er_start ||

        erdp >= (intr->er_start + TRB_SIZE*intr->er_size)) {

        DPRINTF("xhci: ERDP out of bounds: "DMA_ADDR_FMT"\n", erdp);

        DPRINTF("xhci: ER[%d] at "DMA_ADDR_FMT" len %d\n",

                v, intr->er_start, intr->er_size);

        xhci_die(xhci);

        return;

    }

    dp_idx = (erdp - intr->er_start) / TRB_SIZE;

    assert(dp_idx < intr->er_size);

    /* NEC didn't read section 4.9.4 of the spec (v1.0 p139 top Note) and thus

     * deadlocks when the ER is full. Hack it by holding off events until

     * the driver decides to free at least half of the ring */

    if (intr->er_full) {

        int er_free = dp_idx - intr->er_ep_idx;

        if (er_free <= 0) {

            er_free += intr->er_size;

        }

        if (er_free < (intr->er_size/2)) {

            DPRINTF("xhci_events_update(): event ring still "

                    "more than half full (hack)\n");

            return;

        }

    }

    while (intr->ev_buffer_put != intr->ev_buffer_get) {

        assert(intr->er_full);

        if (((intr->er_ep_idx+1) % intr->er_size) == dp_idx) {

            DPRINTF("xhci_events_update(): event ring full again\n");

#ifndef ER_FULL_HACK

            XHCIEvent full = {ER_HOST_CONTROLLER, CC_EVENT_RING_FULL_ERROR};

            xhci_write_event(xhci, &full, v);

#endif

            do_irq = 1;

            break;

        }

        XHCIEvent *event = &intr->ev_buffer[intr->ev_buffer_get];

        xhci_write_event(xhci, event, v);

        intr->ev_buffer_get++;

        do_irq = 1;

        if (intr->ev_buffer_get == EV_QUEUE) {

            intr->ev_buffer_get = 0;

        }

    }

    if (do_irq) {

        xhci_intr_raise(xhci, v);

    }

    if (intr->er_full && intr->ev_buffer_put == intr->ev_buffer_get) {

        DPRINTF("xhci_events_update(): event ring no longer full\n");

        intr->er_full = 0;

    }

}


static int process_line(URLContext *h, char *line, int line_count,

                        int *new_location)

{

    HTTPContext *s = h->priv_data;

    char *tag, *p, *end;

    /* end of header */

    if (line[0] == '\0')

        return 0;

    p = line;

    if (line_count == 0) {

        while (!isspace(*p) && *p != '\0')

            p++;

        while (isspace(*p))

            p++;

        s->http_code = strtol(p, &end, 10);

        av_dlog(NULL, "http_code=%d\n", s->http_code);

        /* error codes are 4xx and 5xx, but regard 401 as a success, so we

         * don't abort until all headers have been parsed. */

        if (s->http_code >= 400 && s->http_code < 600 && s->http_code != 401) {

            end += strspn(end, SPACE_CHARS);

            av_log(h, AV_LOG_WARNING, "HTTP error %d %s\n",

                   s->http_code, end);

            return -1;

        }

    } else {

        while (*p != '\0' && *p != ':')

            p++;

        if (*p != ':')

            return 1;

        *p = '\0';

        tag = line;

        p++;

        while (isspace(*p))

            p++;

        if (!av_strcasecmp(tag, "Location")) {

            strcpy(s->location, p);

            *new_location = 1;

        } else if (!av_strcasecmp (tag, "Content-Length") && s->filesize == -1) {

            s->filesize = atoll(p);

        } else if (!av_strcasecmp (tag, "Content-Range")) {

            /* "bytes $from-$to/$document_size" */

            const char *slash;

            if (!strncmp (p, "bytes ", 6)) {

                p += 6;

                s->off = atoll(p);

                if ((slash = strchr(p, '/')) && strlen(slash) > 0)

                    s->filesize = atoll(slash+1);

            }

            h->is_streamed = 0; /* we _can_ in fact seek */

        } else if (!av_strcasecmp(tag, "Accept-Ranges") && !strncmp(p, "bytes", 5)) {

            h->is_streamed = 0;

        } else if (!av_strcasecmp (tag, "Transfer-Encoding") && !av_strncasecmp(p, "chunked", 7)) {

            s->filesize = -1;

            s->chunksize = 0;

        } else if (!av_strcasecmp (tag, "WWW-Authenticate")) {

            ff_http_auth_handle_header(&s->auth_state, tag, p);

        } else if (!av_strcasecmp (tag, "Authentication-Info")) {

            ff_http_auth_handle_header(&s->auth_state, tag, p);

        } else if (!av_strcasecmp (tag, "Connection")) {

            if (!strcmp(p, "close"))

                s->willclose = 1;

        }

    }

    return 1;

}


static void decode_p_block(FourXContext *f, uint16_t *dst, uint16_t *src,

                           int log2w, int log2h, int stride)

{

    const int index = size2index[log2h][log2w];

    const int h     = 1 << log2h;

    int code        = get_vlc2(&f->gb,

                               block_type_vlc[1 - (f->version > 1)][index].table,

                               BLOCK_TYPE_VLC_BITS, 1);

    uint16_t *start = (uint16_t *)f->last_picture.data[0];

    uint16_t *end   = start + stride * (f->avctx->height - h + 1) - (1 << log2w);

    av_assert2(code >= 0 && code <= 6);

    if (code == 0) {

        if (f->g.buffer_end - f->g.buffer < 1) {

            av_log(f->avctx, AV_LOG_ERROR, "bytestream overread\n");

            return;

        }

        src += f->mv[bytestream2_get_byte(&f->g)];

        if (start > src || src > end) {

            av_log(f->avctx, AV_LOG_ERROR, "mv out of pic\n");

            return;

        }

        mcdc(dst, src, log2w, h, stride, 1, 0);

    } else if (code == 1) {

        log2h--;

        decode_p_block(f, dst, src, log2w, log2h, stride);

        decode_p_block(f, dst + (stride << log2h),

                          src + (stride << log2h), log2w, log2h, stride);

    } else if (code == 2) {

        log2w--;

        decode_p_block(f, dst , src, log2w, log2h, stride);

        decode_p_block(f, dst + (1 << log2w),

                          src + (1 << log2w), log2w, log2h, stride);

    } else if (code == 3 && f->version < 2) {

        mcdc(dst, src, log2w, h, stride, 1, 0);

    } else if (code == 4) {

        if (f->g.buffer_end - f->g.buffer < 1) {

            av_log(f->avctx, AV_LOG_ERROR, "bytestream overread\n");

            return;

        }

        src += f->mv[bytestream2_get_byte(&f->g)];

        if (start > src || src > end) {

            av_log(f->avctx, AV_LOG_ERROR, "mv out of pic\n");

            return;

        }

        if (f->g2.buffer_end - f->g2.buffer < 1){

            av_log(f->avctx, AV_LOG_ERROR, "wordstream overread\n");

            return;

        }

        mcdc(dst, src, log2w, h, stride, 1, bytestream2_get_le16(&f->g2));

    } else if (code == 5) {

        if (f->g2.buffer_end - f->g2.buffer < 1) {

            av_log(f->avctx, AV_LOG_ERROR, "wordstream overread\n");

            return;

        }

        mcdc(dst, src, log2w, h, stride, 0, bytestream2_get_le16(&f->g2));

    } else if (code == 6) {

        if (f->g2.buffer_end - f->g2.buffer < 2) {

            av_log(f->avctx, AV_LOG_ERROR, "wordstream overread\n");

            return;

        }

        if (log2w) {

            dst[0]      = bytestream2_get_le16(&f->g2);

            dst[1]      = bytestream2_get_le16(&f->g2);

        } else {

            dst[0]      = bytestream2_get_le16(&f->g2);

            dst[stride] = bytestream2_get_le16(&f->g2);

        }

    }

}


void ff_snow_vertical_compose97i_sse2(IDWTELEM *b0, IDWTELEM *b1, IDWTELEM *b2, IDWTELEM *b3, IDWTELEM *b4, IDWTELEM *b5, int width){

    long i = width;

    while(i & 0x1F)

    {

        i--;

        b4[i] -= (W_DM*(b3[i] + b5[i])+W_DO)>>W_DS;

        b3[i] -= (W_CM*(b2[i] + b4[i])+W_CO)>>W_CS;

        b2[i] += (W_BM*(b1[i] + b3[i])+4*b2[i]+W_BO)>>W_BS;

        b1[i] += (W_AM*(b0[i] + b2[i])+W_AO)>>W_AS;

    }

         asm volatile (

        "jmp 2f                                      \n\t"

        "1:                                          \n\t"

        "mov %6, %%"REG_a"                           \n\t"

        "mov %4, %%"REG_S"                           \n\t"

        snow_vertical_compose_sse2_load(REG_S,"xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_add(REG_a,"xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_move("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7")

        snow_vertical_compose_sse2_sra("1","xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_r2r_add("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6")

        "pcmpeqd %%xmm1, %%xmm1                      \n\t"

        "psllw $15, %%xmm1                           \n\t"

        "psrlw $14, %%xmm1                           \n\t"

        "mov %5, %%"REG_a"                           \n\t"

        snow_vertical_compose_sse2_r2r_add("xmm1","xmm1","xmm1","xmm1","xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_sra("2","xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_load(REG_a,"xmm1","xmm3","xmm5","xmm7")

        snow_vertical_compose_sse2_sub("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7")

        snow_vertical_compose_sse2_store(REG_a,"xmm1","xmm3","xmm5","xmm7")

        "mov %3, %%"REG_c"                           \n\t"

        snow_vertical_compose_sse2_load(REG_S,"xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_add(REG_c,"xmm1","xmm3","xmm5","xmm7")

        snow_vertical_compose_sse2_sub("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_store(REG_S,"xmm0","xmm2","xmm4","xmm6")

        "mov %2, %%"REG_a"                           \n\t"

        snow_vertical_compose_sse2_add(REG_a,"xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_sra("2","xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_add(REG_c,"xmm0","xmm2","xmm4","xmm6")

        "pcmpeqd %%xmm1, %%xmm1                      \n\t"

        "psllw $15, %%xmm1                           \n\t"

        "psrlw $14, %%xmm1                           \n\t"

        "mov %1, %%"REG_S"                           \n\t"

        snow_vertical_compose_sse2_r2r_add("xmm1","xmm1","xmm1","xmm1","xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_sra("2","xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_add(REG_c,"xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_store(REG_c,"xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_add(REG_S,"xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_move("xmm0","xmm2","xmm4","xmm6","xmm1","xmm3","xmm5","xmm7")

        snow_vertical_compose_sse2_sra("1","xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_r2r_add("xmm1","xmm3","xmm5","xmm7","xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_add(REG_a,"xmm0","xmm2","xmm4","xmm6")

        snow_vertical_compose_sse2_store(REG_a,"xmm0","xmm2","xmm4","xmm6")

        "2:                                          \n\t"

        "sub $32, %%"REG_d"                          \n\t"

        "jge 1b                                      \n\t"

        :"+d"(i)

        :

        "m"(b0),"m"(b1),"m"(b2),"m"(b3),"m"(b4),"m"(b5):

        "%"REG_a"","%"REG_S"","%"REG_c"");

}


static int kvm_has_msr_star(CPUState *env)

{

    static int has_msr_star;

    int ret;

    /* first time */

    if (has_msr_star == 0) {

        struct kvm_msr_list msr_list, *kvm_msr_list;

        has_msr_star = -1;

        /* Obtain MSR list from KVM.  These are the MSRs that we must

         * save/restore */

        msr_list.nmsrs = 0;

        ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, &msr_list);

        if (ret < 0)

            return 0;

        /* Old kernel modules had a bug and could write beyond the provided

           memory. Allocate at least a safe amount of 1K. */

        kvm_msr_list = qemu_mallocz(MAX(1024, sizeof(msr_list) +

                                              msr_list.nmsrs *

                                              sizeof(msr_list.indices[0])));

        kvm_msr_list->nmsrs = msr_list.nmsrs;

        ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, kvm_msr_list);

        if (ret >= 0) {

            int i;

            for (i = 0; i < kvm_msr_list->nmsrs; i++) {

                if (kvm_msr_list->indices[i] == MSR_STAR) {

                    has_msr_star = 1;

                    break;

                }

            }

        }

        free(kvm_msr_list);

    }

    if (has_msr_star == 1)

        return 1;

    return 0;

}


static CharDriverState *qemu_chr_open_stdio(ChardevStdio *opts)

{

    CharDriverState *chr;

    if (is_daemonized()) {

        error_report("cannot use stdio with -daemonize");

        return NULL;

    }

    old_fd0_flags = fcntl(0, F_GETFL);

    tcgetattr (0, &oldtty);

    qemu_set_nonblock(0);

    atexit(term_exit);

    chr = qemu_chr_open_fd(0, 1);

    chr->chr_close = qemu_chr_close_stdio;

    chr->chr_set_echo = qemu_chr_set_echo_stdio;

    if (opts->has_signal) {

        stdio_allow_signal = opts->signal;

    }

    qemu_chr_fe_set_echo(chr, false);

    return chr;

}


void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1)

{

    CPUState *cs = CPU(x86_env_get_cpu(env));

    uint32_t int_ctl;

    qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"

                  PRIx64 ", " TARGET_FMT_lx ")!\n",

                  exit_code, exit_info_1,

                  ldq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb,

                                                   control.exit_info_2)),

                  env->eip);

    if (env->hflags & HF_INHIBIT_IRQ_MASK) {

        stl_phys(cs->as,

                 env->vm_vmcb + offsetof(struct vmcb, control.int_state),

                 SVM_INTERRUPT_SHADOW_MASK);

        env->hflags &= ~HF_INHIBIT_IRQ_MASK;

    } else {

        stl_phys(cs->as,

                 env->vm_vmcb + offsetof(struct vmcb, control.int_state), 0);

    }

    /* Save the VM state in the vmcb */

    svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.es),

                 &env->segs[R_ES]);

    svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.cs),

                 &env->segs[R_CS]);

    svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.ss),

                 &env->segs[R_SS]);

    svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.ds),

                 &env->segs[R_DS]);

    stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base),

             env->gdt.base);

    stl_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit),

             env->gdt.limit);

    stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.idtr.base),

             env->idt.base);

    stl_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.idtr.limit),

             env->idt.limit);

    stq_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, save.efer), env->efer);

    stq_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, save.cr0), env->cr[0]);

    stq_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, save.cr2), env->cr[2]);

    stq_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, save.cr3), env->cr[3]);

    stq_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, save.cr4), env->cr[4]);

    int_ctl = ldl_phys(cs->as,

                       env->vm_vmcb + offsetof(struct vmcb, control.int_ctl));

    int_ctl &= ~(V_TPR_MASK | V_IRQ_MASK);

    int_ctl |= env->v_tpr & V_TPR_MASK;

    if (cs->interrupt_request & CPU_INTERRUPT_VIRQ) {

        int_ctl |= V_IRQ_MASK;

    }

    stl_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, control.int_ctl), int_ctl);

    stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.rflags),

             cpu_compute_eflags(env));

    stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.rip),

             env->eip);

    stq_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, save.rsp), env->regs[R_ESP]);

    stq_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, save.rax), env->regs[R_EAX]);

    stq_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, save.dr7), env->dr[7]);

    stq_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, save.dr6), env->dr[6]);

    stb_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, save.cpl),

             env->hflags & HF_CPL_MASK);

    /* Reload the host state from vm_hsave */

    env->hflags2 &= ~(HF2_HIF_MASK | HF2_VINTR_MASK);

    env->hflags &= ~HF_SVMI_MASK;

    env->intercept = 0;

    env->intercept_exceptions = 0;

    cs->interrupt_request &= ~CPU_INTERRUPT_VIRQ;

    env->tsc_offset = 0;

    env->gdt.base  = ldq_phys(cs->as, env->vm_hsave + offsetof(struct vmcb,

                                                       save.gdtr.base));

    env->gdt.limit = ldl_phys(cs->as, env->vm_hsave + offsetof(struct vmcb,

                                                       save.gdtr.limit));

    env->idt.base  = ldq_phys(cs->as, env->vm_hsave + offsetof(struct vmcb,

                                                       save.idtr.base));

    env->idt.limit = ldl_phys(cs->as, env->vm_hsave + offsetof(struct vmcb,

                                                       save.idtr.limit));

    cpu_x86_update_cr0(env, ldq_phys(cs->as,

                                     env->vm_hsave + offsetof(struct vmcb,

                                                              save.cr0)) |

                       CR0_PE_MASK);

    cpu_x86_update_cr4(env, ldq_phys(cs->as,

                                     env->vm_hsave + offsetof(struct vmcb,

                                                              save.cr4)));

    cpu_x86_update_cr3(env, ldq_phys(cs->as,

                                     env->vm_hsave + offsetof(struct vmcb,

                                                              save.cr3)));

    /* we need to set the efer after the crs so the hidden flags get

       set properly */

    cpu_load_efer(env, ldq_phys(cs->as, env->vm_hsave + offsetof(struct vmcb,

                                                         save.efer)));

    env->eflags = 0;

    cpu_load_eflags(env, ldq_phys(cs->as,

                                  env->vm_hsave + offsetof(struct vmcb,

                                                           save.rflags)),

                    ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK |

                      VM_MASK));

    CC_OP = CC_OP_EFLAGS;

    svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.es),

                       R_ES);

    svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.cs),

                       R_CS);

    svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.ss),

                       R_SS);

    svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.ds),

                       R_DS);

    env->eip = ldq_phys(cs->as,

                        env->vm_hsave + offsetof(struct vmcb, save.rip));

    env->regs[R_ESP] = ldq_phys(cs->as, env->vm_hsave +

                                offsetof(struct vmcb, save.rsp));

    env->regs[R_EAX] = ldq_phys(cs->as, env->vm_hsave +

                                offsetof(struct vmcb, save.rax));

    env->dr[6] = ldq_phys(cs->as,

                          env->vm_hsave + offsetof(struct vmcb, save.dr6));

    env->dr[7] = ldq_phys(cs->as,

                          env->vm_hsave + offsetof(struct vmcb, save.dr7));

    /* other setups */

    cpu_x86_set_cpl(env, 0);

    stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, control.exit_code),

             exit_code);

    stq_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb, control.exit_info_1),

             exit_info_1);

    stl_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, control.exit_int_info),

             ldl_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb,

                                              control.event_inj)));

    stl_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, control.exit_int_info_err),

             ldl_phys(cs->as, env->vm_vmcb + offsetof(struct vmcb,

                                              control.event_inj_err)));

    stl_phys(cs->as,

             env->vm_vmcb + offsetof(struct vmcb, control.event_inj), 0);

    env->hflags2 &= ~HF2_GIF_MASK;

    /* FIXME: Resets the current ASID register to zero (host ASID). */

    /* Clears the V_IRQ and V_INTR_MASKING bits inside the processor. */

    /* Clears the TSC_OFFSET inside the processor. */

    /* If the host is in PAE mode, the processor reloads the host's PDPEs

       from the page table indicated the host's CR3. If the PDPEs contain

       illegal state, the processor causes a shutdown. */

    /* Disables all breakpoints in the host DR7 register. */

    /* Checks the reloaded host state for consistency. */

    /* If the host's rIP reloaded by #VMEXIT is outside the limit of the

       host's code segment or non-canonical (in the case of long mode), a

       #GP fault is delivered inside the host. */

    /* remove any pending exception */

    cs->exception_index = -1;

    env->error_code = 0;

    env->old_exception = -1;

    cpu_loop_exit(cs);

}


static void eval_coefs(int *coefs, const int *refl)

{

    int buffer[10];

    int *b1 = buffer;

    int *b2 = coefs;

    int x, y;

    for (x=0; x < 10; x++) {

        b1[x] = refl[x] << 4;

        for (y=0; y < x; y++)

            b1[y] = ((refl[x] * b2[x-y-1]) >> 12) + b2[y];

        FFSWAP(int *, b1, b2);

    }

    for (x=0; x < 10; x++)

        coefs[x] >>= 4;

}


void kvmppc_hash64_free_pteg(uint64_t token)

{

    struct kvm_get_htab_buf *htab_buf;

    htab_buf = container_of((void *)(uintptr_t) token, struct kvm_get_htab_buf,

                            hpte);

    g_free(htab_buf);

    return;

}


static void kvm_s390_flic_realize(DeviceState *dev, Error **errp)

{

    S390FLICState *fs = S390_FLIC_COMMON(dev);

    KVMS390FLICState *flic_state = KVM_S390_FLIC(dev);

    struct kvm_create_device cd = {0};

    struct kvm_device_attr test_attr = {0};

    int ret;

    Error *errp_local = NULL;

    KVM_S390_FLIC_GET_CLASS(dev)->parent_realize(dev, &errp_local);

    if (errp_local) {

        goto fail;

    }

    flic_state->fd = -1;

    if (!kvm_check_extension(kvm_state, KVM_CAP_DEVICE_CTRL)) {

        error_setg_errno(&errp_local, errno, "KVM is missing capability"

                         " KVM_CAP_DEVICE_CTRL");

        trace_flic_no_device_api(errno);

        goto fail;

    }

    cd.type = KVM_DEV_TYPE_FLIC;

    ret = kvm_vm_ioctl(kvm_state, KVM_CREATE_DEVICE, &cd);

    if (ret < 0) {

        error_setg_errno(&errp_local, errno, "Creating the KVM device failed");

        trace_flic_create_device(errno);

        goto fail;

    }

    flic_state->fd = cd.fd;

    /* Check clear_io_irq support */

    test_attr.group = KVM_DEV_FLIC_CLEAR_IO_IRQ;

    flic_state->clear_io_supported = !ioctl(flic_state->fd,

                                            KVM_HAS_DEVICE_ATTR, test_attr);

    fs->ais_supported = false;

    return;

fail:

    error_propagate(errp, errp_local);

}


static void ide_cd_change_cb(void *opaque, bool load)

{

    IDEState *s = opaque;

    uint64_t nb_sectors;

    s->tray_open = !load;

    bdrv_get_geometry(s->bs, &nb_sectors);

    s->nb_sectors = nb_sectors;

    /*

     * First indicate to the guest that a CD has been removed.  That's

     * done on the next command the guest sends us.

     *

     * Then we set UNIT_ATTENTION, by which the guest will

     * detect a new CD in the drive.  See ide_atapi_cmd() for details.

     */

    s->cdrom_changed = 1;

    s->events.new_media = true;

    s->events.eject_request = false;

    ide_set_irq(s->bus);

}


static int conditional_wait(DBDMA_channel *ch)

{

    dbdma_cmd *current = &ch->current;

    uint16_t wait;

    uint16_t sel_mask, sel_value;

    uint32_t status;

    int cond;

    DBDMA_DPRINTF("conditional_wait\n");

    wait = le16_to_cpu(current->command) & WAIT_MASK;

    switch(wait) {

    case WAIT_NEVER:  /* don't wait */

        return 0;

    case WAIT_ALWAYS: /* always wait */

        return 1;

    }

    status = be32_to_cpu(ch->regs[DBDMA_STATUS]) & DEVSTAT;

    sel_mask = (be32_to_cpu(ch->regs[DBDMA_WAIT_SEL]) >> 16) & 0x0f;

    sel_value = be32_to_cpu(ch->regs[DBDMA_WAIT_SEL]) & 0x0f;

    cond = (status & sel_mask) == (sel_value & sel_mask);

    switch(wait) {

    case WAIT_IFSET:  /* wait if condition bit is 1 */

        if (cond)

            return 1;

        return 0;

    case WAIT_IFCLR:  /* wait if condition bit is 0 */

        if (!cond)

            return 1;

        return 0;

    }

    return 0;

}


static void ide_atapi_cmd_read_dma_cb(void *opaque, int ret)

{

    IDEState *s = opaque;

    int data_offset, n;

    if (ret < 0) {

        ide_atapi_io_error(s, ret);

        goto eot;

    }

    if (s->io_buffer_size > 0) {

        /*

         * For a cdrom read sector command (s->lba != -1),

         * adjust the lba for the next s->io_buffer_size chunk

         * and dma the current chunk.

         * For a command != read (s->lba == -1), just transfer

         * the reply data.

         */

        if (s->lba != -1) {

            if (s->cd_sector_size == 2352) {

                n = 1;

                cd_data_to_raw(s->io_buffer, s->lba);

            } else {

                n = s->io_buffer_size >> 11;

            }

            s->lba += n;

        }

        s->packet_transfer_size -= s->io_buffer_size;

        if (s->bus->dma->ops->rw_buf(s->bus->dma, 1) == 0)

            goto eot;

    }

    if (s->packet_transfer_size <= 0) {

        s->status = READY_STAT | SEEK_STAT;

        s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;

        ide_set_irq(s->bus);

        goto eot;

    }

    s->io_buffer_index = 0;

    if (s->cd_sector_size == 2352) {

        n = 1;

        s->io_buffer_size = s->cd_sector_size;

        data_offset = 16;

    } else {

        n = s->packet_transfer_size >> 11;

        if (n > (IDE_DMA_BUF_SECTORS / 4))

            n = (IDE_DMA_BUF_SECTORS / 4);

        s->io_buffer_size = n * 2048;

        data_offset = 0;

    }

#ifdef DEBUG_AIO

    printf("aio_read_cd: lba=%u n=%d\n", s->lba, n);

#endif

    s->bus->dma->iov.iov_base = (void *)(s->io_buffer + data_offset);

    s->bus->dma->iov.iov_len = n * 4 * 512;

    qemu_iovec_init_external(&s->bus->dma->qiov, &s->bus->dma->iov, 1);

    s->bus->dma->aiocb = bdrv_aio_readv(s->bs, (int64_t)s->lba << 2,

                                       &s->bus->dma->qiov, n * 4,

                                       ide_atapi_cmd_read_dma_cb, s);

    return;

eot:

    block_acct_done(bdrv_get_stats(s->bs), &s->acct);

    ide_set_inactive(s, false);

}


static int nbd_open(BlockDriverState *bs, QDict *options, int flags,

                    Error **errp)

{

    BDRVNBDState *s = bs->opaque;

    char *export = NULL;

    int result, sock;

    /* Pop the config into our state object. Exit if invalid. */

    result = nbd_config(s, options, &export);

    if (result != 0) {

        return result;

    }

    /* establish TCP connection, return error if it fails

     * TODO: Configurable retry-until-timeout behaviour.

     */

    sock = nbd_establish_connection(bs);

    if (sock < 0) {

        return sock;

    }

    /* NBD handshake */

    result = nbd_client_session_init(&s->client, bs, sock, export);

    g_free(export);

    return result;

}


static int pl061_load(QEMUFile *f, void *opaque, int version_id)

{

    pl061_state *s = (pl061_state *)opaque;

    if (version_id != 1)

        return -EINVAL;

    s->locked = qemu_get_be32(f);

    s->data = qemu_get_be32(f);

    s->old_data = qemu_get_be32(f);

    s->dir = qemu_get_be32(f);

    s->isense = qemu_get_be32(f);

    s->ibe = qemu_get_be32(f);

    s->iev = qemu_get_be32(f);

    s->im = qemu_get_be32(f);

    s->istate = qemu_get_be32(f);

    s->afsel = qemu_get_be32(f);

    s->dr2r = qemu_get_be32(f);

    s->dr4r = qemu_get_be32(f);

    s->dr8r = qemu_get_be32(f);

    s->odr = qemu_get_be32(f);

    s->pur = qemu_get_be32(f);

    s->pdr = qemu_get_be32(f);

    s->slr = qemu_get_be32(f);

    s->den = qemu_get_be32(f);

    s->cr = qemu_get_be32(f);

    s->float_high = qemu_get_be32(f);

    return 0;

}


void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr,

                         uint32_t size)

{

    assert(!(size & (size - 1)));       /* power of 2 */

    assert(size >= PCIE_MMCFG_SIZE_MIN);

    assert(size <= PCIE_MMCFG_SIZE_MAX);

    e->size = size;

    memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e,

                          "pcie-mmcfg", e->size);

    e->base_addr = addr;

    memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio);

}


const char *small_strptime(const char *p, const char *fmt,

                           struct tm *dt)

{

    int c, val;

    for(;;) {

        c = *fmt++;

        if (c == '\0') {

            return p;

        } else if (c == '%') {

            c = *fmt++;

            switch(c) {

            case 'H':

                val = date_get_num(&p, 0, 23, 2);

                if (val == -1)

                    return NULL;

                dt->tm_hour = val;

                break;

            case 'M':

                val = date_get_num(&p, 0, 59, 2);

                if (val == -1)

                    return NULL;

                dt->tm_min = val;

                break;

            case 'S':

                val = date_get_num(&p, 0, 59, 2);

                if (val == -1)

                    return NULL;

                dt->tm_sec = val;

                break;

            case 'Y':

                val = date_get_num(&p, 0, 9999, 4);

                if (val == -1)

                    return NULL;

                dt->tm_year = val - 1900;

                break;

            case 'm':

                val = date_get_num(&p, 1, 12, 2);

                if (val == -1)

                    return NULL;

                dt->tm_mon = val - 1;

                break;

            case 'd':

                val = date_get_num(&p, 1, 31, 2);

                if (val == -1)

                    return NULL;

                dt->tm_mday = val;

                break;

            case '%':

                goto match;

            default:

                return NULL;

            }

        } else {

        match:

            if (c != *p)

                return NULL;

            p++;

        }

    }

    return p;

}


void ppc_set_irq (CPUState *env, int n_IRQ, int level)

{

    if (level) {

        env->pending_interrupts |= 1 << n_IRQ;

        cpu_interrupt(env, CPU_INTERRUPT_HARD);

    } else {

        env->pending_interrupts &= ~(1 << n_IRQ);

        if (env->pending_interrupts == 0)

            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);

    }

#if defined(PPC_DEBUG_IRQ)

    if (loglevel & CPU_LOG_INT) {

        fprintf(logfile, "%s: %p n_IRQ %d level %d => pending %08x req %08x\n",

                __func__, env, n_IRQ, level,

                env->pending_interrupts, env->interrupt_request);

    }

#endif

}


static void fd_put_buffer(void *opaque, const uint8_t *buf,

                          int64_t pos, int size)

{

    QEMUFileFD *s = opaque;

    ssize_t len;

    do {

        len = write(s->fd, buf, size);

    } while (len == -1 && errno == EINTR);

    if (len == -1)

        len = -errno;

    /* When the fd becomes writable again, register a callback to do

     * a put notify */

    if (len == -EAGAIN)

        qemu_set_fd_handler2(s->fd, NULL, NULL, fd_put_notify, s);

}


void laio_io_unplug(BlockDriverState *bs, void *aio_ctx, bool unplug)

{

    struct qemu_laio_state *s = aio_ctx;

    assert(s->io_q.plugged > 0 || !unplug);

    if (unplug && --s->io_q.plugged > 0) {

        return;

    }

    if (!s->io_q.blocked && !QSIMPLEQ_EMPTY(&s->io_q.pending)) {

        ioq_submit(s);

    }

}


void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, uint8_t s4_val)

{

    ar->pm1.cnt.s4_val = s4_val;

    ar->wakeup.notify = acpi_notify_wakeup;

    qemu_register_wakeup_notifier(&ar->wakeup);

    memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent),

                          &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);

    memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io);

}


static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)

{

    CPUState *cs;

    CPU_FOREACH(cs) {

        async_run_on_cpu(cs, ppc_cpu_do_nmi_on_cpu, RUN_ON_CPU_NULL);

    }

}


static void do_test_validate_qmp_introspect(TestInputVisitorData *data,

                                            const char *schema_json)

{

    SchemaInfoList *schema = NULL;

    Visitor *v;

    v = validate_test_init_raw(data, schema_json);

    visit_type_SchemaInfoList(v, NULL, &schema, &error_abort);

    g_assert(schema);

    qapi_free_SchemaInfoList(schema);

}


static int64_t coroutine_fn qcow_co_get_block_status(BlockDriverState *bs,

        int64_t sector_num, int nb_sectors, int *pnum, BlockDriverState **file)

{

    BDRVQcowState *s = bs->opaque;

    int index_in_cluster, n;

    uint64_t cluster_offset;

    qemu_co_mutex_lock(&s->lock);

    cluster_offset = get_cluster_offset(bs, sector_num << 9, 0, 0, 0, 0);

    qemu_co_mutex_unlock(&s->lock);

    index_in_cluster = sector_num & (s->cluster_sectors - 1);

    n = s->cluster_sectors - index_in_cluster;

    if (n > nb_sectors)

        n = nb_sectors;

    *pnum = n;

    if (!cluster_offset) {

        return 0;

    }

    if ((cluster_offset & QCOW_OFLAG_COMPRESSED) || s->cipher) {

        return BDRV_BLOCK_DATA;

    }

    cluster_offset |= (index_in_cluster << BDRV_SECTOR_BITS);

    *file = bs->file->bs;

    return BDRV_BLOCK_DATA | BDRV_BLOCK_OFFSET_VALID | cluster_offset;

}


int v9fs_co_symlink(V9fsState *s, V9fsFidState *fidp,

                    const char *oldpath, const char *newpath, gid_t gid)

{

    int err;

    FsCred cred;

    cred_init(&cred);

    cred.fc_uid = fidp->uid;

    cred.fc_gid = gid;

    cred.fc_mode = 0777;

    v9fs_co_run_in_worker(

        {

            err = s->ops->symlink(&s->ctx, oldpath, newpath, &cred);

            if (err < 0) {

                err = -errno;

            }

        });

    return err;

}


static void cpu_x86_fill_host(x86_def_t *x86_cpu_def)

{

    uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;

    x86_cpu_def->name = "host";

    host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);

    x86_cpu_def->level = eax;

    x86_cpu_def->vendor1 = ebx;

    x86_cpu_def->vendor2 = edx;

    x86_cpu_def->vendor3 = ecx;

    host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);

    x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);

    x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);

    x86_cpu_def->stepping = eax & 0x0F;

    x86_cpu_def->ext_features = ecx;

    x86_cpu_def->features = edx;

    if (kvm_enabled() && x86_cpu_def->level >= 7) {

        x86_cpu_def->cpuid_7_0_ebx_features = kvm_arch_get_supported_cpuid(kvm_state, 0x7, 0, R_EBX);

    } else {

        x86_cpu_def->cpuid_7_0_ebx_features = 0;

    }

    host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);

    x86_cpu_def->xlevel = eax;

    host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);

    x86_cpu_def->ext2_features = edx;

    x86_cpu_def->ext3_features = ecx;

    cpu_x86_fill_model_id(x86_cpu_def->model_id);

    x86_cpu_def->vendor_override = 0;

    /* Call Centaur's CPUID instruction. */

    if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 &&

        x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 &&

        x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) {

        host_cpuid(0xC0000000, 0, &eax, &ebx, &ecx, &edx);

        if (eax >= 0xC0000001) {

            /* Support VIA max extended level */

            x86_cpu_def->xlevel2 = eax;

            host_cpuid(0xC0000001, 0, &eax, &ebx, &ecx, &edx);

            x86_cpu_def->ext4_features = edx;

        }

    }

    /*

     * Every SVM feature requires emulation support in KVM - so we can't just

     * read the host features here. KVM might even support SVM features not

     * available on the host hardware. Just set all bits and mask out the

     * unsupported ones later.

     */

    x86_cpu_def->svm_features = -1;

}


static inline void mix_3f_2r_to_stereo(AC3DecodeContext *ctx)

{

    int i;

    float (*output)[256] = ctx->audio_block.block_output;

    for (i = 0; i < 256; i++) {

        output[1][i] += (output[2][i] + output[4][i]);

        output[2][i] += (output[3][i] + output[5][i]);

    }

    memset(output[3], 0, sizeof(output[3]));

    memset(output[4], 0, sizeof(output[4]));

    memset(output[5], 0, sizeof(output[5]));

}


static int vmdk_open_desc_file(BlockDriverState *bs, int flags, char *buf,

                               Error **errp)

{

    int ret;

    char ct[128];

    BDRVVmdkState *s = bs->opaque;

    if (vmdk_parse_description(buf, "createType", ct, sizeof(ct))) {

        error_setg(errp, "invalid VMDK image descriptor");

        ret = -EINVAL;

        goto exit;

    }

    if (strcmp(ct, "monolithicFlat") &&

        strcmp(ct, "vmfs") &&

        strcmp(ct, "vmfsSparse") &&

        strcmp(ct, "twoGbMaxExtentSparse") &&

        strcmp(ct, "twoGbMaxExtentFlat")) {

        error_setg(errp, "Unsupported image type '%s'", ct);

        ret = -ENOTSUP;

        goto exit;

    }

    s->create_type = g_strdup(ct);

    s->desc_offset = 0;

    ret = vmdk_parse_extents(buf, bs, bs->file->exact_filename, errp);

exit:

    return ret;

}